利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

47 条记录 (耗时 0.015 秒)

    CEILING LOUDSPEAKER SYSTEM
    12.
    发明公开
    CEILING LOUDSPEAKER SYSTEM 审中-公开
    天花喇叭系统

    公开(公告)号：EP2721837A1

    公开(公告)日：2014-04-23

    申请号：EP12800877.8

    申请日：2012-06-13

    申请人： RGB Systems, Inc.

    发明人： STEWART, William, C., Jr. ,  HUDSON, Michael ,  FRERICHS, Larry ,  STRONG, Clinton ,  GAMMON, Weldon

    IPC分类号： H04R1/02

    CPC分类号： H04R1/025 ,  H04R1/026 ,  H04R2201/021

    摘要： The present invention comprises a method and apparatus for installing a tile-mounted ceiling speaker that combines the ease of installation of a lay-in speaker system with the visual appearance of a tile-mounted speaker system. In one or more embodiments, the method of the present invention comprises forming an appropriately-sized hole in a ceiling tile, laying an integrated back box and support frame on top of the ceiling tile, connecting wires from an external audio source to terminals provided at the back box, connecting wires provided on the inside of the back box to a loudspeaker cartridge, inserting the loudspeaker cartridge into the hole in the ceiling tile from below, fastening the loudspeaker cartridge to the support frame, and fastening a grille to the loudspeaker cartridge.

    METHOD AND APPARATUS FOR VERTICALLY LOCKING INPUT AND OUTPUT VIDEO SIGNALS
    15.
    发明授权
    METHOD AND APPARATUS FOR VERTICALLY LOCKING INPUT AND OUTPUT VIDEO SIGNALS 有权
    方法和装置垂直耦合输出和输入的视频信号

    公开(公告)号：EP1312070B1

    公开(公告)日：2010-06-02

    申请号：EP00990420.2

    申请日：2000-12-29

    申请人： RGB Systems, Inc.

    发明人： TARACI, Brian, Richard ,  TROUNG, Duy, Duc

    IPC分类号： G09G5/12 ,  G09G5/18

    CPC分类号： G09G5/006 ,  H03L7/235 ,  H04N5/126 ,  H04N5/268 ,  H04N5/4401 ,  H04N5/46 ,  H04N5/74 ,  H04N7/012 ,  H04N7/104 ,  H04N9/641 ,  H04N9/642 ,  H04N21/4113

    摘要： This invention describes a method and apparatus for vertically locking input and output video frame rates. The output vertical sync pulse is locked in phase with the input vertical sync pulse, regardless of the input format and frequency. The output resolution, horizontal refresh rate, and delay are all user selectable. Two Phase Locked Loops are connected in series to achive vertical lock between the input and output frames. Locking the vertical sync pulses between the input and output frames will eliminate mixing of pixels from different input frames in one output frame. The first Phase Locked Loop generates the output pixel clock required to satisfy the user's display preferences but may not precisely represent the desired output pixel clock required for frame locking because current Phase Locked Loops use integer dividers. A second Phase Locked Loop adjusts its output, which is the reference frequency to the first Phase Locked Loop, until a lock is achieved.

    AUDIBLE NOISE REDUCTION IN AN AUDIO POWER AMPLIFIER
    16.
    发明公开
    AUDIBLE NOISE REDUCTION IN AN AUDIO POWER AMPLIFIER 审中-公开

    公开(公告)号：EP3618272A1

    公开(公告)日：2020-03-04

    申请号：EP19193502.2

    申请日：2019-08-25

    申请人： RGB Systems, Inc.

    发明人： Mendenhall, Eric ,  Cesar Muniz, Robert

    IPC分类号： H03F3/185 ,  H03F3/217 ,  H03F3/30 ,  H03F3/45

    摘要： Aspects disclosed herein eliminate audible disturbances that may occur when an audio amplifier is activated and deactivated. A feedback circuit is used to maintain a closed loop when transistors of a power output stage are activate or deactivated, thereby enabling the charge to build or dissipate without causing an audible disturbance. Further, in certain implementations, the power output stage may remain in an enable state for a period of time after deactivation of the audio amplifier regardless of whether an audio input signal is received enabling dissipation of charge without causing an audible disturbance.

    METHOD AND APPARATUS FOR ADAPTIVELY COMPRESSING STREAMING VIDEO
    17.
    发明公开
    METHOD AND APPARATUS FOR ADAPTIVELY COMPRESSING STREAMING VIDEO 审中-公开
    VORRICHTUNG ZUR ADAPTIVEN KOMPRESSION VON STREAMING-VIDEO的方法

    公开(公告)号：EP3151572A1

    公开(公告)日：2017-04-05

    申请号：EP16190991.6

    申请日：2016-09-28

    申请人： RGB Systems Inc.

    发明人： SMITH, Peter Lionel

    IPC分类号： H04N21/238 ,  H04N19/115 ,  H04N19/152 ,  H04N19/169

    摘要： The present invention is a method and apparatus for adaptively compressing and transmitting streaming video, preferably implemented in hardware as part of a codec, that adaptively applies a variable rate of compression to images in a video stream to optimize the quality attainable for a given transport bandwidth. In one or more embodiments, image frames from the video stream are divided into blocks, and a variable compression ratio compression engine compresses the blocks for transmission over a network. Depending on their compressed sizes, one or more of the compressed blocks are packaged into fixed size data packets for transmission over a network. The data packets are fed into a packet buffer. A packet servo releases packets from the buffer to achieve a desired transport data rate. The amount of compression applied by the compression engine is controlled based on the number of packets in the buffer. In one or more embodiments, a plurality of indexed compression vectors are predefined for the compression engine that provide increasing amounts of compression. In one or more embodiments, the index of the compression vector used by the compression engine is incremented when the buffer level of the packet buffer increases, and decremented when the buffer level decreases. In this manner the compression applied by the compression engine automatically adapts to changing entropy within the images of the video stream to optimize the video quality for a given transport data rate.

    摘要翻译： 本发明是一种用于自适应地压缩和传输流视频的方法和装置，优选地以硬件方式实现，作为编解码器的一部分，其自适应地将可变速率的压缩应用于视频流中的图像，以优化给定传输带宽可达到的质量 。 在一个或多个实施例中，来自视频流的图像帧被划分成块，并且可变压缩比压缩引擎压缩块以在网络上传输。 根据压缩大小，一个或多个压缩块被打包成固定大小的数据包，以便通过网络进行传输。 数据包被馈送到包缓冲器中。 分组伺服器从缓冲器释放分组以实现期望的传输数据速率。 基于缓冲器中的分组数量来控制由压缩引擎施加的压缩量。 在一个或多个实施例中，为压缩引擎预先设定多个索引压缩向量，其提供增加的压缩量。 在一个或多个实施例中，当分组缓冲器的缓冲器电平增加时，由压缩引擎使用的压缩向量的索引递增，并且当缓冲器级别减小时递减。 以这种方式，由压缩引擎施加的压缩自动适应视频流的图像内的变化熵，以优化给定传输数据速率的视频质量。

    IMAGE DATA PROCESSING
    20.
    发明公开
    IMAGE DATA PROCESSING 审中-公开
    BILDDATENVERARBEITUNG

    公开(公告)号：EP2928191A1

    公开(公告)日：2015-10-07

    申请号：EP15164544.7

    申请日：2006-08-11

    申请人： RGB Systems, Inc.

    发明人： Smith, Peter Lionel

    IPC分类号： H04N19/176 ,  H04N19/70 ,  H04N19/64 ,  H04N19/63 ,  H04N19/61 ,  H04N19/107 ,  H04N19/132 ,  H04N19/17 ,  H04N19/635 ,  H04N19/42 ,  H04N19/89 ,  H04N19/645 ,  H04N19/86 ,  H04N19/507 ,  H04N19/68

    CPC分类号： H04N19/68 ,  H04N19/107 ,  H04N19/13 ,  H04N19/132 ,  H04N19/17 ,  H04N19/174 ,  H04N19/176 ,  H04N19/182 ,  H04N19/186 ,  H04N19/1883 ,  H04N19/33 ,  H04N19/42 ,  H04N19/423 ,  H04N19/507 ,  H04N19/51 ,  H04N19/61 ,  H04N19/63 ,  H04N19/635 ,  H04N19/645 ,  H04N19/647 ,  H04N19/66 ,  H04N19/70 ,  H04N19/86 ,  H04N19/89 ,  H04N19/96

    摘要： Methods of data encoding using trees formed with logic gates are described which lead to spatial compression of image data. Data encoding is achieved using a five-level wavelet transform, such as the Haar or the 2/10 transform. A dual transform engine is used, the first and engine being used for the first part of the first-level transform, the second part of the first-level transform and the subsequent-level transforms being performed by the second transform engine within a time interval which is less than or equal to the time taken by the first transform engine to effect the part-transform. Each bit plane of the resulting coefficients is then encoded by forming a tree structure from the bits and OR logical combinations thereof. Redundant data are removed from the resulting tree structure, and further data can be removed by using a predetermined compression profile. The resulting blocks of compressed data are of variable length and are packaged with sync words and index words for transmission so that the location and identity of the transformed data blocks can be determined from the received signal.

    摘要翻译： 描述了使用由逻辑门形成的树的数据编码方法，其导致图像数据的空间压缩。 使用五级小波变换（例如Haar或2/10变换）实现数据编码。 使用双变换引擎，第一和第一级引擎被用于第一级变换的第一部分，第一级变换的第二部分和后级转换由第二变换引擎在一段时间间隔内执行 其小于或等于第一变换引擎进行部分变换所花费的时间。 然后通过从比特形成树结构和其OR逻辑组合来对所得系数的每个比特平面进行编码。 从结果树结构中删除冗余数据，并且可以通过使用预定的压缩简档去除进一步的数据。 所得到的压缩数据块具有可变长度，并且与同步字和索引字封装以进行传输，从而可以根据接收到的信号确定变换数据块的位置和身份。