公开(公告)号：EP3246907A1

公开(公告)日：2017-11-22

申请号：EP15794046.1

申请日：2015-05-12

申请人： BOE Technology Group Co., Ltd.

发明人： YIN, Xinshe ,  WANG, Ying ,  LI, Guang

IPC分类号： G09G3/32 ,  H01L27/32

CPC分类号： G09G3/3233 ,  G06F1/26 ,  G09G3/3208 ,  G09G3/3225 ,  G09G3/3258 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2320/0204 ,  G09G2320/0233 ,  G09G2320/0242 ,  G09G2330/028

摘要： The present disclosure provides a display array substrate, a compensation method, a display panel and a display device. The display array substrate includes at least one power line and a voltage application unit. The at least one power line is connected to pixels in at least one column within an effective display region on the display array substrate. The power application unit is arranged outside the effective display region and configured to apply power supply voltages to at least two power supply voltage input points on the at least one power line. An absolute value of a voltage difference between the at least two power supply voltage input points is less than a predetermined voltage threshold.

摘要翻译： 本发明提供一种显示阵列基板，补偿方法，显示面板和显示装置。 显示阵列基板包括至少一个电源线和电压施加单元。 该至少一条电源线连接到显示阵列基板上的有效显示区域内的至少一列中的像素。 电力施加单元布置在有效显示区域的外部并且被配置为将电源电压施加到所述至少一个电力线上的至少两个电源电压输入点。 至少两个电源电压输入点之间的电压差的绝对值小于预定电压阈值。

公开(公告)号：EP2874140B1

公开(公告)日：2018-04-04

申请号：EP12880722.9

申请日：2012-11-21

申请人： BOE Technology Group Co., Ltd.

发明人： KIM, Tae Gyu ,  KIM, Pil Seok ,  WANG, Ying

IPC分类号： G09G3/3266 ,  G11C19/28

CPC分类号： H05B33/0896 ,  G09G3/3266 ,  G09G2300/0861 ,  G09G2310/0286 ,  G11C19/184

摘要： A light-emitting control circuit, a light-emitting control method and a shift register. The light-emitting control circuit comprises an inputting terminal (Input), an input sampling unit (11), an outputting unit (12), a resetting unit (13), an output pulling-down unit (14) and an outputting terminal for a light-emitting control signal (EM[n]). The input sampling unit (11) samples an input signal under a control of a first clock signal (CK1); the outputting unit (12) generates a light-emitting control signal under a control of a second clock signal (CK2) after the input sampling unit (11) samples the input signal; the resetting unit (13) resets the light-emitting control signal through the output pulling-down unit (14) under a control of a third clock signal (13). An OLED device is in an OFF state during a process for writing display data into pixel cells and the OLED device is turned on to emit light after the display data is written into the pixel cells, thus a display image is guaranteed not to generate flickers due to an unstable state of a pixel circuit as the data is written.

公开(公告)号：EP3156994A1

公开(公告)日：2017-04-19

申请号：EP14866804.9

申请日：2014-09-26

申请人： BOE Technology Group Co., Ltd.

发明人： WANG, Ying ,  YIN, Xinabe ,  LI, Guang ,  SUN, Liang

IPC分类号： G09G3/32

摘要： A pixel driving circuit and a driving method thereof, an array substrate and a display apparatus are provided. The pixel driving circuit comprises a data line (Data), a gate line (Gate), a first power supply line (ELVDD), a second power supply line (ELVSS), a reference signal line (ref), a light emitting device (D), a driving transistor (T7), a storage capacitor (C1), a reset unit, a data writing unit, a compensating unit and a light emitting control unit. The pixel driving circuit can compensate and remove non-uniformity in displaying caused by variances in threshold voltage among driving transistors.

摘要翻译： 提供像素驱动电路及其驱动方法，阵列基板和显示装置。 像素驱动电路包括数据线（Data），栅极线（Gate），第一电源线（ELVDD），第二电源线（ELVSS），参考信号线（ref），发光器件 D），驱动晶体管（T7），存储电容器（C1），复位单元，数据写入单元，补偿单元和发光控制单元。 像素驱动电路可以补偿和消除由驱动晶体管之间的阈值电压的方差引起的显示不均匀性。

公开(公告)号：EP3133587A1

公开(公告)日：2017-02-22

申请号：EP14859301.5

申请日：2014-09-05

申请人： BOE Technology Group Co., Ltd.

发明人： WANG, Ying

IPC分类号： G09G3/32

CPC分类号： G09G3/3266 ,  G09G3/32 ,  G09G3/3258 ,  G09G2300/0417 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021 ,  G11C19/28

摘要： The present disclosure provides a gate driving circuit which can be applied in a display panel. The gate driving circuit may include a driving signal output unit, provided with a storage capacitor; a driving control unit, configured to sample an input signal in a first period of each scanning cycle, control the driving signal output unit to output a first gate driving signal which is configured to turn on thin film transistors (TFTs) in a display panel in a second period of each scanning cycle, and control the driving signal output unit to output a second gate driving signal which is configured to turn off the TFTs in the display panel by using the storage capacitor across which a voltage difference is within a predetermined range in a third period of each scanning cycle; and a compensating unit, configured to maintain the voltage difference across the storage capacitor to be within the predetermined range in the third period of each scanning cycle.

摘要翻译： 本公开提供了可应用于显示面板的栅极驱动电路。 栅极驱动电路可以包括具有存储电容器的驱动信号输出单元; 驱动控制单元，配置为在每个扫描周期的第一周期中对输入信号进行采样，控制所述驱动信号输出单元以输出第一栅极驱动信号，所述第一栅极驱动信号被配置为在显示面板中导通薄膜晶体管（TFT） 每个扫描周期的第二周期，并且控制驱动信号输出单元，以输出第二栅极驱动信号，该第二栅极驱动信号被配置为通过使用电压差在预定范围内的存储电容器来关闭显示面板中的TFT 每个扫描周期的第三个周期; 以及补偿单元，被配置为在每个扫描周期的第三周期内将保持电容器两端的电压差保持在预定范围内。

公开(公告)号：EP2874140A1

公开(公告)日：2015-05-20

申请号：EP12880722.9

申请日：2012-11-21

申请人： BOE Technology Group Co., Ltd.

发明人： KIM, Tae Gyu ,  KIM, Pil Seok ,  WANG, Ying

IPC分类号： G09G3/32 ,  G11C19/28

CPC分类号： H05B33/0896 ,  G09G3/3266 ,  G09G2300/0861 ,  G09G2310/0286 ,  G11C19/184

摘要： A light-emitting control circuit, a light-emitting control method and a shift register. The light-emitting control circuit comprises an inputting terminal (Input), an input sampling unit (11), an outputting unit (12), a resetting unit (13), an output pulling-down unit (14) and an outputting terminal for a light-emitting control signal (EM[n]). The input sampling unit (11) samples an input signal under a control of a first clock signal (CK1); the outputting unit (12) generates a light-emitting control signal under a control of a second clock signal (CK2) after the input sampling unit (11) samples the input signal; the resetting unit (13) resets the light-emitting control signal through the output pulling-down unit (14) under a control of a third clock signal (13). An OLED device is in an OFF state during a process for writing display data into pixel cells and the OLED device is turned on to emit light after the display data is written into the pixel cells, thus a display image is guaranteed not to generate flickers due to an unstable state of a pixel circuit as the data is written.

摘要翻译： 发光控制电路，发光控制方法和移位寄存器。 发光控制电路包括输入端子（Input），输入采样单元（11），输出单元（12），复位单元（13），输出下拉单元（14）和输出端子 发光控制信号（EM [n]）。 输入采样单元（11）在第一时钟信号（CK1）的控制下采样输入信号; 输出单元（12）在输入采样单元（11）对输入信号进行采样之后，在第二时钟信号（CK2）的控制下产生发光控制信号; 复位单元（13）在第三时钟信号（13）的控制下通过输出拉出单元（14）复位发光控制信号。 在将显示数据写入像素单元的过程中，OLED器件处于关闭状态，并且在将显示数据写入像素单元之后，OLED器件导通以发光，因此保证显示图像不会产生闪烁 到数据写入时的像素电路的不稳定状态。

公开(公告)号：EP4006986A1

公开(公告)日：2022-06-01

申请号：EP20904244.9

申请日：2020-05-15

申请人： BOE Technology Group Co., Ltd.

发明人： LI, Meng ,  HE, Min ,  WANG, Ying

IPC分类号： H01L27/32

摘要： A display panel and an electronic device are provided. The display panel includes: a base substrate; and a plurality of pixels arranged in an array on the base substrate, the plurality of pixels including a first pixel and a second pixel. The first pixel includes a first light-transmitting area and a first display area that are sequentially arranged in a first direction, and the second pixel includes a second light-transmitting area and a second display area that are sequentially arranged in the first direction. The first pixel and the second pixel are adjacent in a second direction substantially perpendicular to the first direction, and the first light-transmitting area and the second light-transmitting area are adjacent in the second direction. The display panel further includes: a first gate line and a second gate line both arranged between the first light-transmitting area and the second light-transmitting area that are adjacent in the second direction, and the first gate line and the second gate line both extend in the first direction. The first light-transmitting area is contiguous to the first gate line, and the second light-transmitting area is contiguous to the second gate line.

公开(公告)号：EP3621062A1

公开(公告)日：2020-03-11

申请号：EP18794971.4

申请日：2018-01-05

申请人： BOE Technology Group Co., Ltd. ,  Hefei Xinsheng Optoelectronics Technology Co., Ltd.

发明人： LI, Meng ,  WANG, Ying

IPC分类号： G09G3/36 ,  G11C19/28

摘要： A shift register unit and a drive method therefor, a gate drive circuit and a display apparatus. The shift register unit comprises: a shift drive sub-circuit (10) for storing the voltage across a signal input end (INPUT) or outputting the voltage across a second clock signal end (CLK2) to a first signal output end (CR); an output sub-circuit (30) for outputting the voltage across a first voltage end (VDD) to a second signal output end (OUT); and a pull-down sub-circuit (20) for pulling down the voltage across the first signal output end (CR) and the second signal output end (OUT) to a second voltage end (VSSL) and a third voltage end (VSS), respectively.

公开(公告)号：EP3217383A1

公开(公告)日：2017-09-13

申请号：EP15762464.4

申请日：2015-03-23

申请人： BOE Technology Group Co., Ltd.

发明人： LONG, Chunping ,  WANG, Ying

IPC分类号： G09G3/20

CPC分类号： G09G3/2092 ,  G09G3/20 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： The present disclosure provides a gate-on-array (GOA) driving unit, a GOA driving method, a GOA driving circuit, and a display device. The GOA driving unit includes an input end, a starting module, a control module, an output module and a gate driving signal output end. The starting module is configured to, within a starting time period, input a triggering signal from the input end into the control module under the control of a first clock signal. The control module is configured to, within an output time period, output a second clock signal to the output module. The output module is configured to output a first level to the gate driving signal output end within the starting time period, output the second clock signal to the gate driving signal output end within the output time period, and output the first level to the gate driving signal output end within a maintenance time period. The first clock signal is of a phase reverse to the second clock signal.

摘要翻译： 本发明提供了一种阵列栅阵列GOA驱动单元，GOA驱动方法，GOA驱动电路和显示装置。 GOA驱动单元包括输入端，启动模块，控制模块，输出模块和栅极驱动信号输出端。 启动模块被配置为在启动时间段内在第一时钟信号的控制下从输入端向控制模块输入触发信号。 控制模块被配置为在输出时间段内向输出模块输出第二时钟信号。 输出模块用于在启动时间段内向栅极驱动信号输出端输出第一电平，在输出时间段内将第二时钟信号输出至栅极驱动信号输出端，并将第一电平输出至栅极驱动 信号输出端在维护时间段内结束。 第一时钟信号具有与第二时钟信号相反的相位。

公开(公告)号：EP3159880A1

公开(公告)日：2017-04-26

申请号：EP14868702.3

申请日：2014-09-30

申请人： BOE Technology Group Co., Ltd.

发明人： SUN, Liang ,  WANG, Ying ,  SUN, Tuo ,  MA, Zhanjie ,  YIN, Xinshe ,  ZHANG, Lintao ,  HUANGFU, Lujiang

IPC分类号： G09G3/32

CPC分类号： G09G3/3233 ,  G09G3/3258 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2320/0233 ,  G09G2320/0257 ,  G09G2320/043 ,  G09G2320/045 ,  G09G2320/0626

摘要： A pixel driving circuit, driving method thereof, an array substrate and display apparatus, the pixel driving circuit comprises: a data line for providing a data voltage (Data); a gate line for providing a scanning voltage (Gate); a first power supply line for providing a first power supply voltage (ELVDD); a second power supply line for providing a second power supply voltage (ELVSS); a light emitting device (D) connected to the second power supply line (ELVSS); a driving transistor (T7) connected to the first power supply line (ELVDD); a storage capacitor (C1) having a first terminal (N1) connected to a gate of the driving transistor (T7) and configured to transfer information including the data voltage to the gate of the driving transistor (T7); a resetting unit configured to reset a voltage across the storage capacitor (C1) as a predetermined signal voltage; a data writing unit configured to write information including the data voltage into the second terminal (N2) of the storage capacitor (C1); a compensating unit configured to write information including a threshold voltage of the driving transistor (T7) and information of the first power supply voltage into the first terminal (N1) of the storage capacitor (C1); and a light emitting control unit configured to write the first power supply voltage into the second terminal (N2) of the storage capacitor (C1) and control the driving transistor (T7) to drive the light emitting device (D) to emit light. The solution can compensate for and eliminating the display non-uniformity caused by the threshold voltage difference of the driving transistor.

摘要翻译： 一种像素驱动电路及其驱动方法，阵列基板和显示装置，所述像素驱动电路包括：用于提供数据电压（Data）的数据线; 用于提供扫描电压（Gate）的栅极线; 用于提供第一电源电压（ELVDD）的第一电源线; 用于提供第二电源电压（ELVSS）的第二电源线; 连接到第二电源线（ELVSS）的发光器件（D）; 连接到第一电源线（ELVDD）的驱动晶体管（T7）; 存储电容器（C1），具有连接到所述驱动晶体管（T7）的栅极的第一端子（N1），并被配置为将包括所述数据电压的信息传输到所述驱动晶体管（T7）的栅极; 复位单元，被配置为将所述存储电容器（C1）两端的电压复位为预定信号电压; 数据写入单元，被配置为将包括数据电压的信息写入存储电容器（C1）的第二端子（N2）中; 补偿单元，被配置为将包括驱动晶体管（T7）的阈值电压和第一电源电压的信息的信息写入到存储电容器（C1）的第一端子（N1）中; 以及发光控制单元，被配置为将第一电源电压写入存储电容器（C1）的第二端子（N2）中并且控制驱动晶体管（T7）以驱动发光器件（D）发光。 该解决方案可以补偿并消除由驱动晶体管的阈值电压差引起的显示不均匀性。

公开(公告)号：EP2672479B1

公开(公告)日：2015-09-23

申请号：EP12830911.9

申请日：2012-12-14

申请人： BOE Technology Group Co., Ltd.

发明人： KIM, Tae Gyu ,  WANG, Ying ,  KIM, Pil Seok

IPC分类号： G09G3/32 ,  G11C19/28

CPC分类号： G09G3/3225 ,  G09G3/3266 ,  G09G2300/0861 ,  G11C19/28