公开(公告)号：EP3393206A1

公开(公告)日：2018-10-24

申请号：EP17425045.6

申请日：2017-04-21

申请人： Infineon Technologies AG

发明人： SCENINI, Andrea

IPC分类号： H05B33/08

CPC分类号： G09G3/32 ,  G09G2300/0404 ,  G09G2310/0237 ,  G09G2310/0286 ,  G09G2320/0295 ,  G09G2320/041 ,  G09G2320/0693 ,  G09G2360/18 ,  H05B33/0854

摘要： In some examples, a device includes at least two light sources, buffer circuitry configured to receive a bit stream, and driver circuitry configured to receive the bit stream from the buffer circuitry and to drive the at least two light sources based on the bit stream. In some examples, the device further includes monitor circuitry configured to determine a voltage drop across each light source of the at least two light sources and snooping circuitry configured to read an inactive bit of the bit stream. In some examples, the snooping circuitry is further configured to read an active bit of the bit stream after reading the inactive bit and based on a value of the inactive bit and to cause the monitor circuitry to determine a voltage drop across a light source of the at least two light sources based on a value of the active bit.

公开(公告)号：EP2991069B1

公开(公告)日：2018-09-19

申请号：EP13856062.8

申请日：2013-07-05

申请人： Beijing BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

发明人： ZHANG, Zhengxin ,  ZHENG, Yi

IPC分类号： G09G3/36

CPC分类号： H02H7/20 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2330/08 ,  G09G2330/12 ,  H02H1/0007 ,  H02H3/28

摘要： Disclosed are a gate driving circuit and an array substrate relating to the field of display technique and capable of ensuring that, when there is a malfunction such as a short-circuit and the like among input paths of clock signals for a certain gate driving unit, other gate driving units can operate properly. The gate driving circuit comprises a plurality of sets of gate driving units, each set of gate driving units comprises m gate driving units, and m is an integer greater than 1; each set of gate driving units outputs a gate driving signal to a gate line; when one gate driving unit in a set of gate driving units malfunctions, said gate driving unit in malfunction is terminated in operation and other gate driving units in the set of gate driving units maintain an operation of the set of gate driving units.

公开(公告)号：EP2743929B1

公开(公告)日：2018-09-12

申请号：EP13197080.8

申请日：2013-12-13

申请人： BOE Technology Group Co., Ltd. ,  Hefei BOE Optoelectronics Technology Co., Ltd.

发明人： Kong, Yi ,  Liu, Junhao

IPC分类号： G11C19/18 ,  G09G3/36 ,  G11C19/28

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G2310/0286 ,  G11C19/184

摘要： Provided are a shift register unit, a gate driver and a display device. The shift register unit comprises: a pull-up control module, a pull-up module, a reset module, and a denoise module for holding a signal output from the first output terminal when the signal has a level higher than a first preset threshold and outputting the held signal from a second output terminal when a signal output from a denoise control signal output terminal has a level higher than a second preset threshold. The signal output from the first output terminal is filtered by using the signal output from the first output terminal and the signal output from the denoise control signal output terminal, and thus burrs in the signal output from the first output terminal are eliminated, that is, noise is eliminated, solving the problem that a defective display picture due to the noise in the output signal.

公开(公告)号：EP3361473A1

公开(公告)日：2018-08-15

申请号：EP16853065.7

申请日：2016-09-13

申请人： Chongqing Boe Optoelectronics Technology Co., Ltd. ,  Chongqing Boe Optoelectronics Technology Co. Ltd.

发明人： XIAO, Lijun ,  HSU, Yih Jen ,  HOU, Shuai ,  LU, Xu ,  SHANG, Fei

IPC分类号： G09G3/36

CPC分类号： G09G3/3258 ,  G09G3/3266 ,  G09G3/3291 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2310/0202 ,  G09G2310/0218 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2330/026 ,  G09G2330/027

摘要： Disclosed are a gate driving apparatus (200) for a pixel array and a driving method therefor. The pixel array comprises N gate lines. The gate driving apparatus (200) comprises: a plurality of gate drivers (221, 222,..., 22(n-1), 22n), wherein the N gate lines are divided into a plurality of groups, each group comprises a plurality of gate lines, each gate driver (221, 222,..., 22(n-1), 22n) corresponds to the plurality of groups on a one-to-one basis, and each gate driver (221, 222,..., 22(n-1), 22n) is used for generating a gate driving signal for the plurality of gate lines in the group corresponding thereto; and a driver control module (210) which is used for generating a plurality of driver control signals (XON1, XON2,..., XON(n-1), XONn), the plurality of driver control signals (XON1, XON2,..., XON(n-1), XONn) corresponding to the plurality of gate drivers (221, 222,..., 22(n-1), 22n) on a one-to-one basis, and a state switch between any two driver control signals among the plurality of driver control signals (XON1, XON2,..., XON(n-1), XONn) has at least a difference of a first time, wherein under the control of the plurality of driver control signals (XON1, XON2,..., XON(n-1), XONn), the plurality of gate drivers (221, 222,..., 22(n-1), 22n) are switched from a first state to a second state in sequence, and each gate driver (221, 222,..., 22(n-1), 22n) generates gate driving signals in the same phase at the same time for the plurality of gate lines in the group corresponding thereto in the second state.

公开(公告)号：EP3223267A4

公开(公告)日：2018-07-18

申请号：EP15750915

申请日：2015-03-17

申请人： BOE TECHNOLOGY GROUP CO LTD

发明人： MA ZHANJIE

IPC分类号： G09G3/3266 ,  G09G3/3225 ,  G11C19/28

CPC分类号： G09G3/3677 ,  G09G3/20 ,  G09G3/3266 ,  G09G2300/0809 ,  G09G2300/0861 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291 ,  G11C19/28

摘要： The preset disclosure relates to a shift register unit, a shift register, a gate driving circuit and a display device. The shift register unit includes a first module, a second module and a control module, where the first module including a first control transistor is configured to make an output terminal of the shift register unit in a current stage output a high level signal, where a gate electrode of the first control transistor is connected to the control module, a first electrode thereof is connected to a high level signal input terminal, a second electrode thereof is connected to the output terminal; the control module is configured to control on and off states of the first control transistor; and the second module including a second control transistor is configured to make the output terminal of the shift register unit in the current stage output a low level signal, where a gate electrode and a first electrode of the second control transistor are both connected to a low level signal input terminal, and a second electrode thereof is connected to the output terminal. An amount of transistors in the shift register unit may be reduced, thereby reducing a space occupied by the shift register unit and then facilitating to realize a narrow border of a display device.

公开(公告)号：EP3217387A4

公开(公告)日：2018-06-27

申请号：EP15762458

申请日：2015-03-19

申请人： BOE TECHNOLOGY GROUP CO LTD

发明人： ZHANG YUANBO ,  HAN SEUNGWOO ,  IM YUNSIK

IPC分类号： G09G3/36 ,  G11C19/28

CPC分类号： G09G3/3677 ,  G09G3/3266 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2310/0286 ,  G09G2330/06 ,  G11C19/28

摘要： The present invention provides a shift register unit, a gate driving circuit and a display device, which belongs to the field of display technology. The shift register unit of the present invention comprises: an input module, a pull-up module, a pull-down control module, a pull-down module, a reset module and a discharge module, wherein the input module is connected to a signal input end and a pull-up control node; the pull-up module is connected to the pull-up control node, a first clock signal port and a signal output end; the pull-down control module is connected to a pull-down control node and a second clock signal port; the pull-down module is connected to the pull-down control node, the pull-up control node and a low level signal; the discharge module comprises a discharge capacitor, a first end of the discharge capacitor being connected to the pull-up module and the pull-up control node, a second end being connected to an output signal reset input end; the reset module is connected to a reset signal input end, the pull-up control node and the low level signal.

公开(公告)号：EP3226231A4

公开(公告)日：2018-06-13

申请号：EP15777598

申请日：2015-03-13

申请人： BOE TECHNOLOGY GROUP CO LTD

发明人： MA ZHANJIE

IPC分类号： G09G3/3266 ,  G09G3/3208 ,  G11C19/28

CPC分类号： G09G3/3291 ,  G09G3/3225 ,  G09G3/3266 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/28 ,  H03K5/00 ,  H03K5/135 ,  H03K5/1506

摘要： An embodiment of the present invention discloses a gate drive circuit comprising several stages of unit circuits, wherein each unit circuit comprises: a high level terminal, a low level terminal, a first clock terminal, a second clock terminal, a gate output terminal, a logic turn-on input terminal, a logic turn-on output terminal, a control module, a first gating module and a second gating module. An embodiment of the present invention also provides a display device comprising the gate drive circuit. A gate drive circuit with interlaced output is realized, ensuring no suspended state in time sequence between interlaced lines, while maintaining an original dual time sequence (i.e., eliminating suspended state between interlaced lines, and ensuring a stable output of the shifting register).

公开(公告)号：EP2509077B1

公开(公告)日：2018-05-09

申请号：EP12162618.8

申请日：2012-03-30

申请人： Beijing BOE Optoelectronics Technology Co., Ltd.

发明人： Chen, Xi ,  Cui, Wenhai

IPC分类号： G11C19/28 ,  G09G3/36

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G2310/0286

摘要： The present invention discloses a shifting register and an apparatus for driving gate lines, and it relates to Liquid Crystal Display technical field, for reducing the noise of a shifting register during non-working period. The shifting register comprises: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a capacitor and a pull-down module, and the pull-down module is connected among a clock signal port, a first node and a signal output terminal, and further is connected to a low level signal terminal, for maintaining the first node and the signal output terminal to be at low level during the non-working period of the shifting register. The apparatus for driving gate lines comprises a plurality of above shifting registers connected in serial. The present invention is applicable to driving gate lines.

公开(公告)号：EP3309775A1

公开(公告)日：2018-04-18

申请号：EP15891402.8

申请日：2015-11-30

申请人： BOE Technology Group Co., Ltd. ,  Hefei BOE Optoelectronics Technology Co., Ltd.

发明人： ZHANG, Xiaojie ,  SHAO, Xianjie

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/36 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/184 ,  G11C19/28 ,  G11C19/287 ,  G11C19/36

摘要： A shift register unit, comprises: a first output module (10) and a second output module (20), configured to output a signal of a clock signal terminal (CLK) to a signal output terminal (OUT) under the control of a pull-up control node (PU); an input module (30), configured to output a voltage of the first power supply terminal (VDD) to the pull-up control node (PU) under the control of a signal of the signal input terminal (IN); a pull-down control module (40), configured to pull down a signal of the pull-down control node (PD) to a voltage of the second power supply terminal (VSS) under the control of the signal input terminal (IN); a pull-down module (50), configured to pull down signals of the pull-up control node (PU) and the signal output terminal (OUT) to the voltage of the second power supply (VSS) under the control of the pull-down control node (PD); and a reset module (60), configured to output a signal of the first power supply terminal (VDD) to the pull-down control node (PD) under the control of the reset signal terminal (RESET). The shift register unit is capable of raising the output capability of the signal output terminal (OUT) and shortening the falling time of the output waveform. A gate driving circuit and a display apparatus are also provided.

摘要翻译： 一种移位寄存器单元，包括：第一输出模块（10）和第二输出模块（20），用于在拉的控制下将时钟信号端（CLK）的信号输出到信号输出端（OUT） 控制节点（PU）; 输入模块（30），用于在所述信号输入端（IN）的信号控制下，将所述第一电源端（VDD）的电压输出至所述上拉控制节点（PU）; 下拉控制模块，用于在所述信号输入端IN的控制下，将所述下拉控制节点PD的信号下拉至所述第二电源端VSS的电压; 下拉模块，用于在所述下拉模块的控制下，将所述上拉控制节点PU和所述信号输出端OUT的信号下拉至所述第二电源VSS的电压; 下拉控制节点（PD）; 以及复位模块（60），被配置为在复位信号端子（RESET）的控制下将第一电源端子（VDD）的信号输出到下拉控制节点（PD）。 移位寄存器单元能够提高信号输出端（OUT）的输出能力，缩短输出波形的下降时间。 还提供了栅极驱动电路和显示装置。

公开(公告)号：EP2963635B1

公开(公告)日：2018-04-11

申请号：EP13866489.1

申请日：2013-05-21

申请人： BOE Technology Group Co., Ltd. ,  Hefei BOE Optoelectronics Technology Co., Ltd.

发明人： ZENG, Mian ,  LI, Xiaohe ,  KIM, Jaikwang

IPC分类号： G09G3/20 ,  G11C19/28

CPC分类号： G11C19/28 ,  G09G3/20 ,  G09G3/3648 ,  G09G2300/0809 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2320/043

摘要： Provided is a shift register unit, a gate driving apparatus and a display device capable of increasing a lifespan of a shift register. The shift register unit according to the present disclosure includes: a first thin film field effect transistor, a drain thereof connected with a first signal terminal, a source thereof connected with the outputting node at the present stage, a gate thereof connected with a first node; a second thin film field effect transistor, a drain thereof connected with the first signal terminal, a source thereof connected with the pulling-up node, and a gate thereof connected with the first node; a third thin film field effect transistor, a drain thereof connected with a second signal terminal, a source thereof connected with the outputting node at the present stage, and a gate thereof connected with a second node; a fourth thin film field effect transistor, a drain thereof connected with the second signal terminal, a source thereof connected with the pulling-up node, and a gate thereof connected with the second node; and a node voltage control module, configured to control the first node and the second node to be in a high potential state alternatively when the shift register unit is in a pulling-down phase. The present disclosure increases the lifespan of the shift register.