公开(公告)号：EP0993153B1

公开(公告)日：2005-07-13

申请号：EP99117476.4

申请日：1999-09-10

申请人： Hitachi, Ltd.

发明人： Yazaki, Takeki ,  Aimoto, Takeshi ,  Sugai, Kazuo ,  Matsuyama, Nobuhito

IPC分类号： H04L12/46 ,  H04L12/44 ,  H04L12/56 ,  H04L29/06

CPC分类号： H04L12/46 ,  H04L29/06 ,  H04L45/00 ,  H04L45/54 ,  H04L45/60 ,  H04L45/745 ,  H04L47/50 ,  H04L47/6215 ,  H04L49/205 ,  H04L49/25 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9036 ,  H04L67/327 ,  H04L69/12 ,  H04L2012/5636 ,  H04Q11/0478

公开(公告)号：EP1058424A3

公开(公告)日：2001-10-10

申请号：EP00111053.5

申请日：2000-06-02

申请人： Hitachi, Ltd.

发明人： Yazaki, Takeki ,  Aimoto, Takeshi

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04L12/5602 ,  H04L2012/5636 ,  H04L2012/5651 ,  H04Q11/0478

摘要： A bandwidth monitoring device for use in a network for transferring priority packets in preference to non priority packets as far as the amount of the priority packets is within a contract bandwidth established between a network user and a network operator, comprising a bandwidth check result decision unit (520, 1320) for detecting whether the bandwidth of the priority packets is less than the contract bandwidth, and a DSCP decision unit (530) for determining that a non priority packet may be transferred as a priority packet when the bandwidth of the priority packets is less than the contract bandwidth thereby to sufficiently use the contract bandwidth.

公开(公告)号：EP2230804A1

公开(公告)日：2010-09-22

申请号：EP10006671.1

申请日：1999-07-07

申请人： Hitachi Ltd.

发明人： Kohzuki, Kiyoshi ,  Aimoto, Takeshi ,  Yazaki, Takeki ,  Tanaka, Noriyuki ,  Yamamura, Yoshinori

IPC分类号： H04L12/56

CPC分类号： H04L12/5601 ,  H04L12/5602 ,  H04L47/22 ,  H04L47/2433 ,  H04L47/2441 ,  H04L47/50 ,  H04L47/522 ,  H04L47/627 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5679 ,  H04L2012/568 ,  H04Q11/0478

摘要： A traffic shaper comprises a cell buffer for temporarily storing an ATM cell arrived thereat, a first calculator for calculating an estimated cell sending time according to a VC contracted bandwidth, a second calculator for calculating an estimated cell sending time according to a VP contracted bandwidth, a binary tree VP sorting circuit for determining VP to be sent in top priority, a binary tree VC sorting circuit for determining VC to be sent in top priority, and a sending circuit for sending a cell in which the determined VP and VC are both brought to a transmittable state. The VP estimated sending time is revised according to the VC estimated sending time.

摘要翻译： 流量整形器包括用于临时存储到达该ATM信元的ATM信元的信元缓冲器，用于根据VC合同带宽计算估计信元发送时间的第一计算器，用于根据VP合同带宽计算估计信元发送时间的第二计算器， 用于确定要以最高优先级发送的VP的二叉树VP分类电路，用于确定要以最高优先级发送的VC的二叉树VC分类电路，以及用于发送确定的VP和VC两者的小区的发送电路 到可发送状态。 VP估计发送时间根据VC估计的发送时间进行修改。

公开(公告)号：EP1940094A1

公开(公告)日：2008-07-02

申请号：EP08005355.6

申请日：2000-06-02

申请人： Hitachi, Ltd.

发明人： Yazaki, Takeki ,  Aimoto, Takeshi

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04L12/5602 ,  H04L2012/5636 ,  H04L2012/5651 ,  H04Q11/0478

摘要： A bandwidth monitoring device for use in a network for transferring priority packets in preference to non priority packets as far as the amount of the priority packets is within a contract bandwidth established between a network user and a network operator, comprising a bandwidth check result decision unit (520, 1320) for detecting whether the bandwidth of the priority packets is less than the contract bandwidth, and a DSCP decision unit (530) for determining that a non priority packet may be transferred as a priority packet when the bandwidth of the priority packets is less than the contract bandwidth thereby to sufficiently use the contract bandwidth.

摘要翻译： 一种用于网络中的带宽监视设备，用于优先于非优先级分组传输优先级分组，直到所述优先级分组的数量在网络用户和网络运营商之间建立的合同带宽内，包括带宽检查结果决定单元 （520,1320），用于检测所述优先级分组的带宽是否小于所述合同带宽;以及DSCP决定单元（530），用于当所述优先级分组的带宽作为优先分组时，确定所述非优先分组可以作为优先分组传送 小于合同带宽，从而充分利用合同带宽。

公开(公告)号：EP1560373B1

公开(公告)日：2007-03-28

申请号：EP05008938.2

申请日：1999-09-10

申请人： Hitachi, Ltd.

发明人： Yazaki, Takeki c/o Hitachi Ltd., Int. Prop. Gr. ,  Aimoto, Takeshi ,  Sugai, Kazuo c/o Hitachi Ltd.Int.Prop.Gr. ,  Matsuyama, Nobuhito

IPC分类号： H04L12/46 ,  H04L12/44 ,  H04L12/56 ,  H04L29/06

CPC分类号： H04L12/46 ,  H04L29/06 ,  H04L45/00 ,  H04L45/54 ,  H04L45/60 ,  H04L45/745 ,  H04L47/50 ,  H04L47/6215 ,  H04L49/205 ,  H04L49/25 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9036 ,  H04L67/327 ,  H04L69/12 ,  H04L2012/5636 ,  H04Q11/0478

公开(公告)号：EP0993153A1

公开(公告)日：2000-04-12

申请号：EP99117476.4

申请日：1999-09-10

申请人： Hitachi, Ltd. ,  Hitachi Information Technology Co., Ltd.

发明人： Yazaki, Takeki ,  Aimoto, Takeshi ,  Sugai, Kazuo ,  Matsuyama, Nobuhito

IPC分类号： H04L12/46 ,  H04L12/44 ,  H04L12/56 ,  H04L29/06

CPC分类号： H04L12/46 ,  H04L29/06 ,  H04L45/00 ,  H04L45/54 ,  H04L45/60 ,  H04L45/745 ,  H04L47/50 ,  H04L47/6215 ,  H04L49/205 ,  H04L49/25 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9036 ,  H04L67/327 ,  H04L69/12 ,  H04L2012/5636 ,  H04Q11/0478

摘要： A packet forwarding apparatus provided with a plurality of line interface units, comprises a routing processing unit for referring to a routing table, based on header information of received packet to specify one of output lines to output the received packet, a flow detection unit for referring to an entry table, in which a plurality of entries with flow conditions and control information are registered, to retrieve control information defined by the entry with a flow condition which coincides with that of the header information of the received packet, and a packet forwarding unit for transferring the received packet to one of the line interface units connected to the output line specified by the routing processing unit. The entry table id divided into a plurality of subtables corresponding to the values of flow attributes associated with the received packets and the flow detection unit retrieves the control information from one of said subtables specified by the value of the flow attribute corresponding to the received packet.

摘要翻译： 具有多个线路接口单元的分组转发装置包括：路由处理单元，用于根据接收到的分组的头信息来参考路由表，以指定输出所述接收分组的输出行之一;流量检测单元，用于参考 将具有流条件和控制信息的多个条目登记到的条目表中，以与所接收的分组的标题信息一致的流条件来检索由条目定义的控制信息，以及分组转发单元 用于将接收的分组传送到连接到由路由处理单元指定的输出线路的线路接口单元之一。 入口表id被划分为与接收到的分组相关联的流属性的值对应的多个子表，并且流检测单元从与接收到的分组对应的流属性的值指定的所述子表之一中检索控制信息。

公开(公告)号：EP0993144A2

公开(公告)日：2000-04-12

申请号：EP99117151.3

申请日：1999-08-31

申请人： Hitachi, Ltd. ,  Hitachi Information Technology Co., Ltd.

发明人： Akahane, Shinichi ,  Sugai, Kazuo ,  Aimoto, Takeshi ,  Matsuyama, Nobuhito ,  Sako, Yoshihito ,  Sekino, Hiroshi

IPC分类号： H04L12/18 ,  H04L12/56 ,  H04L12/46

CPC分类号： H04L45/742 ,  H04L12/18 ,  H04L12/46 ,  H04L45/00 ,  H04L45/16

摘要： In a high speed multicast route searching method of searching information of a transmission port to which a received multicast packet is next transferred: a route address is formed by coupling a receiver address and a sender address in this order; one p-th power-of-2-branch tree node is configured by a collection of one two-branch tree node and two-branch tree nodes of p-1 stages totalling ((p-th power of 2) - 1) nodes just under the one two-branch tree node to form a p-th power-of-2-branch tree which is stored in a memory (300); not one bit but consecutive p bits of the route address coupling the receiver address and sender address in a received multicast packet in this order are checked at the same time; and in accordance with the values of the consecutive bits, a search tree stored in the memory (300) is searched. In this manner, a search process can be completed by tracing nodes (the number of bits of a search key divided by p) times at a maximum, independently from the number of entries.

摘要翻译： 在高速组播路由搜索方法中，搜索接收到的多播分组下一次传输的传输端口的信息：路由地址通过以下顺序形成：接收方地址和发送方地址; 一个第p个2分支树节点由一个两分支树节点和总共（（p-th功率为2）-1）节点的p-1级的两分支树节点的集合来配置 恰好在一个双分支树节点下方，以形成存储在存储器（300）中的第p个2分支树枝; 不是一个位，而是同时检查在接收到的多播分组中以该顺序耦合接收器地址和发送器地址的路由地址的连续p位; 并且根据连续比特的值，搜索存储在存储器（300）中的搜索树。 以这种方式，可以独立于条目的数量，通过跟踪节点（搜索关键字的比特数除以p）乘以最大值来完成搜索处理。

公开(公告)号：EP0847219A2

公开(公告)日：1998-06-10

申请号：EP97121249.3

申请日：1997-12-03

申请人： Hitachi, Ltd.

发明人： Yazaki, Takeki ,  Aimoto, Takeshi

IPC分类号： H04Q11/04 ,  H04L12/56

CPC分类号： H04L49/505 ,  H04L49/103 ,  H04L49/108 ,  H04L49/3009 ,  H04L49/3081 ,  H04L49/501 ,  H04L2012/5619 ,  H04L2012/5636 ,  H04L2012/5651 ,  H04L2012/5681 ,  H04Q11/0478

摘要： An ATM switch having a packet level discard function includes an upstream congestion detection circuit (127) for detecting a congestion state of an ATM switch provided in the upstream and a packet level discard control table (129) for holding at every connection a packet level discard priority (703-2j) indicating whether the ATM switch provided in the upstream has the packet level discard function or not, and wherein cells transmitted via an ATM switch not having a packet level discard function or an ATM switch which is not in the congestion state are packet-level-discarded with a priority to other cells. Thus, it is possible to improve a goodput of the ATM network in which ATM switches having a packet level discard function and ATM switches not having a packet level discard function are provided in a mixed state.

摘要翻译： 具有分组级丢弃功能的ATM交换机包括用于检测在上游设置的ATM交换机的拥塞状态的上游拥塞检测电路（127）和用于在每个连接保持分组级丢弃的分组级丢弃控制表（129） 指示上游提供的ATM交换机是否具有分组级丢弃功能的优先级（703-2j），并且其中经由不具有分组级丢弃功能的ATM交换机或不处于拥塞状态的ATM交换机发送的小区 被分组丢弃，优先级别为其他单元。 因此，可以提高具有分组级丢弃功能的ATM交换机和不具有分组级别丢弃功能的ATM交换机的混合状态的ATM网络的输入。

公开(公告)号：EP0173981A3

公开(公告)日：1989-05-31

申请号：EP85110962.9

申请日：1985-08-30

申请人： HITACHI, LTD. ,  HITACHI MICROCOMPUTER SYSTEM LTD.

发明人： Uchiyama, Kunio ,  Hasegawa, Atsushi ,  Aimoto, Takeshi ,  Nishimukai, Tadahiko

IPC分类号： G06F12/08

CPC分类号： G06F12/0888

摘要： A cache memory (26) is contained in a processor (1) which features a high efficiency in spite of its small capacity. In the cache memory control circuit of the invention, it is detected whether the access operation of the processor is directed to a particular region of the memory, and when the data is to be read out from, or is to be written onto, the particular region, the data is copied onto the cache memory (26) and when the data is to be read out from other regions, operation of the memory is executed immediately without waiting for the reference of cache memory. By assigning the particular region for the data that are to be used repeatedly, it is possible to obtain a cache memory (26) having good efficiency in spite of its small capacity. A representative example of such data is the data in a stack.

公开(公告)号：EP2139263A1

公开(公告)日：2009-12-30

申请号：EP09012940.4

申请日：2000-02-23

申请人： Hitachi Ltd.

发明人： Yazaki, Takeki ,  Aimoto, Takeshi

IPC分类号： H04Q11/04 ,  H04L12/56 ,  H04L12/28

CPC分类号： H04L47/2441 ,  H04L47/10 ,  H04L47/2408 ,  H04L47/2458 ,  H04L47/50 ,  H04L47/522 ,  H04L47/6215 ,  H04L47/6225 ,  H04L47/623 ,  H04L49/90 ,  H04L49/9036 ,  H04L49/9042 ,  H04L2012/5651 ,  H04Q11/0478

摘要： The present invention relates to a router for transmitting a packet and a corresponding network system, wherein said router has plural modes to be applied to input packets. The plural modes include a first mode which is a mode that decides priority of the packet by at least one of the address information and the application information, and a third mode which is a mode that decides to rewrite the DS value by at least one of the address information and the application information. A control unit (112) of the router switches a mode to be applied to an input packet among the plural modes based on the packet header information of the input packet.

摘要翻译： 本发明涉及一种用于传输分组的路由器以及相应的网络系统，其中所述路由器具有多种应用于输入分组的模式。 所述多个模式包括第一模式和第三模式，所述第一模式是通过所述地址信息和所述应用信息中的至少一个决定所述分组的优先级的模式，所述第三模式是决定通过以下至少一项来重写所述DS值的模式： 地址信息和应用信息。 路由器的控制单元（112）基于输入分组的分组报头信息来切换要应用于多个模式中的输入分组的模式。