Interface circuit and method for connecting a memory controller with a synchronous or an asynchronous bus system
    12.
    发明公开
    Interface circuit and method for connecting a memory controller with a synchronous or an asynchronous bus system 失效
    接口电路和用于与一个同步或异步总线系统连接的存储器控​​制器的方法。

    公开(公告)号:EP0135879A2

    公开(公告)日:1985-04-03

    申请号:EP84110754.3

    申请日:1984-09-10

    IPC分类号: G06F13/16

    CPC分类号: G06F13/4234

    摘要: © An interface circuit for connecting a memory controller (208) to either a synchronous bus or an asynchronous bus. The interface circuit comprises switch means (197) for supplying a signal indicative of the type of bus and synchronizing means (198) for synchronizing memory access request signals with a local clock when the interface circuit is coupled to an asynchronous bus.
    An interface method of connecting memory circuits to either a synchronous bus or an asynchronous bus. The method comprises the generation of a mode signal indicative of the type of bus, and the synchronization of the memory access request signals with a local clock when the mode signals indicate an asynchronous bus.

    摘要翻译: 对于存储器控制器(208)连接到任何一个同步总线或异步总线上的接口电路。 该接口电路包括用于供应指示总线的类型的信号和同步用于与本地时钟当接口电路在异步总线耦合到同步存储器访问请求信号的装置(198)的开关装置(197)。 ... 存储电路连接到任何一个同步总线或异步总线上的接口方法。 该方法包括指示总线的类型的一个模式信号,并且所述存储器访问请求信号与本地时钟同步的产生。当模式信号指示异步总线。