REDUCTION OF SMALL SPURS IN TRANSMITTERS
    12.
    发明公开
    REDUCTION OF SMALL SPURS IN TRANSMITTERS 有权
    减少干扰在Little关于媒体

    公开(公告)号:EP2815510A1

    公开(公告)日:2014-12-24

    申请号:EP13708552.8

    申请日:2013-02-13

    IPC分类号: H04B1/04

    CPC分类号: H04L25/08 H04B1/0475

    摘要: An apparatus for reducing spurs is described. The apparatus includes a coarse digital to analog converter (DAC). The apparatus also includes a correction term generator. The correction term generator generates a correction term. The correction term has an amplitude within a dynamic range of the coarse digital to analog converter (DAC). The apparatus also includes a baseband filter. The correction term is selected such that the baseband filter reduces the correction term to an amplitude approximating that of a spur in a transmit signal. The correction term is used to reduce a spur.

    REDUCTION OF SMALL SPURS IN TRANSMITTERS
    18.
    发明授权
    REDUCTION OF SMALL SPURS IN TRANSMITTERS 有权
    减少发射机中的小波

    公开(公告)号:EP2815510B1

    公开(公告)日:2018-03-28

    申请号:EP13708552.8

    申请日:2013-02-13

    IPC分类号: H04B1/04

    CPC分类号: H04L25/08 H04B1/0475

    摘要: An apparatus for reducing spurs is described. The apparatus includes a coarse digital to analog converter (DAC). The apparatus also includes a correction term generator. The correction term generator generates a correction term. The correction term has an amplitude within a dynamic range of the coarse digital to analog converter (DAC). The apparatus also includes a baseband filter. The correction term is selected such that the baseband filter reduces the correction term to an amplitude approximating that of a spur in a transmit signal. The correction term is used to reduce a spur.

    FREQUENCY SYNTHESIZER ARCHITECTURE IN A TIME-DIVISION DUPLEX MODE FOR A WIRELESS DEVICE
    19.
    发明公开
    FREQUENCY SYNTHESIZER ARCHITECTURE IN A TIME-DIVISION DUPLEX MODE FOR A WIRELESS DEVICE 有权
    频率合成器架构在时间双工模式无线设备

    公开(公告)号:EP2820765A2

    公开(公告)日:2015-01-07

    申请号:EP13710211.7

    申请日:2013-02-28

    IPC分类号: H04B1/40 H03B28/00

    摘要: A dual frequency synthesizer architecture for a wireless device operating in a time division duplex (TDD) mode is disclosed. In an exemplary design, the wireless device includes first and second frequency synthesizers. The first frequency synthesizer generates a first oscillator signal used to generate a first/receive local oscillator (LO) signal at an LO frequency for the receiver. The second frequency synthesizer generates a second oscillator signal used to generate a second/transmit LO signal at the same LO frequency for the transmitter. The two frequency synthesizers generate their oscillator signals to obtain receive and transmit LO signals at the same LO frequency when the wireless device operates in the TDD mode.