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公开(公告)号:EP0176226A2
公开(公告)日:1986-04-02
申请号:EP85305971.5
申请日:1985-08-22
申请人: FUJITSU LIMITED
发明人: Suzuki, Atsushi
IPC分类号: H03K3/033
摘要: A semiconductor circuit for generating a pulse with a constant pulse width regardless of the pulse widths of the input signals, including a pulse-width fixing circuit (WC) for latching the output signal of a gate circuit when an input signal received by the gate circuit changes and for resetting the latching a predetermined time after the latching.
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公开(公告)号:EP0087510A1
公开(公告)日:1983-09-07
申请号:EP82111119.2
申请日:1982-12-02
发明人: Eardley, David Barry
IPC分类号: H03K3/033
CPC分类号: H03K3/033
摘要: A multivibrator comprising two inverting OR circuits (1', 2') connected in closed loop configuration by a cascaded series of delaying elements (11, 12, 13) some of which are partially bypassed at selected locations so as to reduce the recovery time of the multivibrator. The delaying elements comprise one or more inverting OR circuits (13) positioned at the selected locations with the remainder being simple inverting circuits. Although the output pulse width of the multivibrator is determined by the total delay of the cascaded units, the recovery time is made a fraction thereof, depending upon the number and the locations of the bypasses.
摘要翻译: 一种多谐振荡器,包括通过级联的一系列延迟元件(11,12,13)以闭环配置连接的两个反相OR电路(1分钟,2分钟),其中一些延迟元件在选定位置被部分旁路以便减少恢复时间 多谐振荡器。 延迟元件包括位于选定位置的一个或多个反相OR电路(13),其余部分是简单的反相电路。 尽管多谐振荡器的输出脉冲宽度由级联单元的总延迟确定,但是根据旁路的数量和位置,恢复时间是其一部分。
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