公开(公告)号：EP0374526A2

公开(公告)日：1990-06-27

申请号：EP89121760.6

申请日：1989-11-24

申请人： International Business Machines Corporation

发明人： Buerkle, Daniel Joseph ,  Ngai, Agnes Yee

IPC分类号： G06F9/26

CPC分类号： G06F9/30189 ,  G06F9/268 ,  G06F9/30145

摘要： A mechanism for translating a particular macroinstruction into its associated microprogram routine in a general purpose microprogrammed computer where the macroin­struction is capable of execution by either hardware or by microprogram. A table-look up approach is employed for a microprogrammed macroinstruction. The table is embedded in random-access-memory and contains entries representing the origins of various micro­program routines to execute the macroinstruction. The table entries are addressed by bits generated from the operation-code of the macroinstruction. The output of the table is used to address a single level control store containing the microprogram routines. Hardware is assembled in a single facility that is accessible by the microprogram routines to minimize the size of the microprogram routines required to execute the macroinstruction.

摘要翻译： 一种用于在通用微程序计算机中将特定宏指令转换成其相关联的微程序例程的机制，其中宏指令能够由硬件或微程序执行。 采用表格查找方式进行微程序化宏指令。 该表嵌入在随机存取存储器中，并包含表示执行宏指令的各种微程序例程的起源的条目。 表条目由宏指令的操作码生成的位进行寻址。 表的输出用于寻址包含微程序例程的单级控制存储。 硬件组装在可由微程序程序访问的单个设施中，以最小化执行宏指令所需的微程序程序的大小。

公开(公告)号：EP0221191B1

公开(公告)日：1990-03-21

申请号：EP84103253.5

申请日：1980-04-30

申请人： MOTOROLA, INC.

发明人： Tredennick, Harry Leslie ,  Gunter, Thomas Glen

IPC分类号： G06F9/26

CPC分类号： G06F9/30094 ,  G06F9/262 ,  G06F9/264 ,  G06F9/268 ,  G06F9/30 ,  G06F9/30061 ,  G06F9/30145 ,  G06F9/30167

公开(公告)号：EP0333319A2

公开(公告)日：1989-09-20

申请号：EP89301379.7

申请日：1989-02-14

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Freidin, Philip ,  New, Bernard J.

IPC分类号： G06F9/22 ,  G06F9/26

CPC分类号： G06F13/385 ,  G05B2219/2207

摘要： A single-chip microprogrammable sequencer (10) provides a bus (12) for connection of an external microprocessor. The sequencer includes a register file (40) which consists of a number of registers accessible to the microprocessor by which the microprocessor can monitor and control operation of the sequencer. The sequencer also includes a writeable control store (52) which is accessible to the microprocessor. Microinstructions may be written to the store by the microprocessor so that selected programs or program segments will be executed by the sequencer. A breakpoint register (104), included in the register file, is used in conjunction with a program counter portion of the sequencer providing a breakpoint facility for the microprocessor. Similarly, start, halt, reset and single-step operations may be performed by the sequencer under control of the microprocessor.

摘要翻译： 单片微程序定序器（10）提供用于连接外部微处理器的总线（12）。 定序器包括寄存器文件（40），寄存器文件（40）由微处理器可访问的多个寄存器组成，微处理器可以通过该寄存器文件监视和控制定序器的操作。 定序器还包括可由微处理器访问的可写控制存储器（52）。 微指令可以由微处理器写入存储器，以便选定的程序或程序段将由定序器执行。 包括在寄存器文件中的断点寄存器（104）与定序器的程序计数器部分结合使用，为微处理器提供断点设施。 类似地，在微处理器的控制下，定序器可以执行启动，停止，复位和单步操作。

公开(公告)号：EP0189202A3

公开(公告)日：1989-08-23

申请号：EP86100913.2

申请日：1986-01-23

申请人： HITACHI, LTD.

发明人： Kida, Hiroyuki ,  Maejima, Hideo

IPC分类号： G06F9/26

CPC分类号： G06F9/26 ,  G06F9/261

摘要： Micro instructions having a predetermined relation are modified so that an original micro instruction and address assigned thereto can be restored by combining one or more modified micro instructions and address assigned thereto. A microprogram memory (8) stores the micro instructions in such a modified form and at the modified address. When an original address is designated, one or more term lines are activated in a decoder (86, 88) of the microprogram memory (8), and modified micro instructions corresponding to the activated term lines are led from a memory array (82, 84) of the microprogram memory (8). The read modified micro instructions are logically combined to restore the original micro instruction. Thereby, the number of micro instructions to be actually stored in the microprogram memory (8) can be reduced.

公开(公告)号：EP0284060A3

公开(公告)日：1989-07-19

申请号：EP88104730.2

申请日：1988-03-24

申请人： Bull HN Information Systems Inc.

发明人： Heslin, Peter M.

IPC分类号： G06F9/26

CPC分类号： G06F9/264

摘要： A microprocessor integrated circuit chip includes a plurality of functional areas containing a large number of widely distributed signal sources. An on-chip selection network is distributed on the chip which enables the selection of signals from the large number of sources under microinstruction control without any decrease in chip performance. The network includes an access bus which is distributed to the functional areas as a function of the concentration of signals provided by the sources. Individual decoders are strategically located on the chip and connect in common to a control bus. Each decoder connects to a plurality of switches for linking the sources of a functional area to the access bus. A selector circuit terminates the access bus at one end. Under microprogram control, the selector circuit is enabled to select which final source signal is applied to the functional area containing branching circuits for selecting a next microinstruction to be executed by the microprocessor.

公开(公告)号：EP0162928B1

公开(公告)日：1989-05-10

申请号：EP84904161.1

申请日：1984-11-08

申请人： FUJITSU LIMITED

发明人： KITAMURA, Toshiaki ,  ONISHI, Katsumi

IPC分类号： G06F9/26 ,  G06F9/28

CPC分类号： G06F9/261 ,  G06F9/265 ,  G06F9/28 ,  G06F9/30149

摘要： A control memory (referred to as "SUBOPCS", hereinafter) which stores information employed to generate the microprogram first address of an instruction having a suboperation code. The access to a control memory by an ordinary operation code and the access to the SUBOPCS by the suboperation code are effected simultaneously. Data respectively read out from the control memories is compiled so as to generate the first address of the microprogram. Thus, the capacity of the SUBOPCS is reduced within a range in which any reduction in the capacity does not interfere with the allocation of the microinstruction, and the microprogram first address of the instruction having the suboperation code is determined without requiring any extra time.

公开(公告)号：EP0221577A3

公开(公告)日：1989-02-01

申请号：EP86115571.1

申请日：1986-11-10

申请人： NEC CORPORATION

发明人： Kaneko, Hiroaki c/o NEC Corp.

IPC分类号： G06F9/26

CPC分类号： G06F9/265 ,  G06F9/264

摘要： Microprogram control unit is provided for processing conditional branch micro-instructions stored in a micro- instruction memory to control the function of an information processing apparatus. Unit includes a microprogram counter coupled to the micro-instruction memory and containing address for accessing the micro-instruction stored in the memory. A circuit is provided for registering the micro- instruction received from the micro-instruction memory and having an address field coupled to the microprogram counter and a condition field for designating a condition to be judged. A detecting circuit is coupled to the registering circuits to receive the micro-instruction therefrom and for detecting the conditional branch micro-instruction. Further, there is provided a circuit for generating status signals representing respectively a plurality of the status of the information processing apparatus and selectively outputting anyone of the status signals. There is also provided a circuit for judging the coincidence between the status signal selectively outputted from the status signal generating circuit and the condition designated by the content of the condition field of the micro-instruction registered by the registering circuit to output a branch control signal. With this arrangement, the address field of the micro- program counter may be replaced by the content of the address field of the micro-instruction in accordance with the branch control signal.

公开(公告)号：EP0279953A2

公开(公告)日：1988-08-31

申请号：EP87119350.4

申请日：1987-12-30

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Bosshart, Patrick W.

IPC分类号： G06F9/26 ,  G06F9/28

CPC分类号： G06F9/28 ,  G06F9/26 ,  G06F9/3017 ,  G06F9/30189

摘要： A computer system uses microcode subroutines to execute complex macroinstruction. Each macroinstruction is used to index a table (18). Simple macroinstructions have a single microinstruction counterpart in the table (18), and such microinstruction is performed directly in order to execute that macroinstruction. The table entry corresponding to more complex macroinstructions is a jump microinstruction, with the target of the microcode jump being an appropriate subroutine in microcode memory (16).

摘要翻译： 计算机系统使用微代码子程序执行复杂的宏指令。 每个宏指令用于索引表（18）。 简单的宏指令在表（18）中具有单个微指令对应方式，并且这种微指令被直接执行以执行该宏指令。 对应于更复杂的宏指令的表条目是跳转微指令，微代码跳转的目标是微代码存储器（16）中的适当子程序。

公开(公告)号：EP0221741A2

公开(公告)日：1987-05-13

申请号：EP86308295.4

申请日：1986-10-24

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Wang, Bu Chin ,  Parikh, Dakshesh ,  Daly, Marita

IPC分类号： G06F9/26 ,  G06F9/40 ,  G06F9/42

CPC分类号： G06F9/325 ,  G06F9/262

摘要： A microsequencer suitable for use in real time data processing computer applications is described. The micro­sequencer permits the utilization of a wide variety of program execution control structures, such as multiply-­nested iterative looping, subroutine calls, branching multiple-interrupt servicing, all in a manner that is both instruction code and execution speed efficient. This is a accomplished by providing a microsequencer for producing execution point addresses in the execution of a program including nested program segments of one or more program instructions, the microsequencer comprising sequencer means for generating successive execution point addresses, the sequencer means including branch control means for provid­ing a branch address to the sequencer means as a generated execution point address, the branch control means being responsive to a condition input, and nest control means, responsive to the sequencer means, for detecting changes in the effective segment nest level of the execution point address and for providing a corresponding condition input to the branch control means.

摘要翻译： 描述适用于实时数据处理计算机应用的微定序器。 微定序器允许以指令代码和执行速度有效的方式利用各种各样的程序执行控制结构，例如多重嵌套迭代循环，子程序调用，分支多中断服务。 这是通过提供用于在执行包括一个或多个程序指令的嵌套程序段的程序的执行中产生执行点地址的微定序器来实现的，所述微定序器包括用于产生连续执行点地址的定序器装置，所述定序器装置包括分支控制装置， 向所述定序器装置提供分支地址作为生成的执行点地址，所述分支控制装置响应于条件输入;以及嵌套控制装置，响应于所述定序器装置，用于检测所述执行点的有效段嵌套级别的改变 并且用于向分支控制装置提供相应的条件输入。

公开(公告)号：EP0221577A2

公开(公告)日：1987-05-13

申请号：EP86115571.1

申请日：1986-11-10

申请人： NEC CORPORATION

发明人： Kaneko, Hiroaki c/o NEC Corp.

IPC分类号： G06F9/26

CPC分类号： G06F9/265 ,  G06F9/264

摘要： Microprogram control unit is provided for processing conditional branch micro-instructions stored in a micro- instruction memory to control the function of an information processing apparatus. Unit includes a microprogram counter coupled to the micro-instruction memory and containing address for accessing the micro-instruction stored in the memory. A circuit is provided for registering the micro- instruction received from the micro-instruction memory and having an address field coupled to the microprogram counter and a condition field for designating a condition to be judged. A detecting circuit is coupled to the registering circuits to receive the micro-instruction therefrom and for detecting the conditional branch micro-instruction. Further, there is provided a circuit for generating status signals representing respectively a plurality of the status of the information processing apparatus and selectively outputting anyone of the status signals. There is also provided a circuit for judging the coincidence between the status signal selectively outputted from the status signal generating circuit and the condition designated by the content of the condition field of the micro-instruction registered by the registering circuit to output a branch control signal. With this arrangement, the address field of the micro- program counter may be replaced by the content of the address field of the micro-instruction in accordance with the branch control signal.

摘要翻译： 提供微程序控制单元，用于处理存储在微指令存储器中的条件分支微指令，以控制信息处理装置的功能。 单元包括耦合到微指令存储器并包含用于访问存储在存储器中的微指令的地址的微程序计数器。 提供电路用于登记从微指令存储器接收的微指令，并具有耦合到微程序计数器的地址字段和用于指定要判断的条件的条件字段。 检测电路耦合到注册电路以从其接收微指令并检测条件转移微指令。 此外，提供了一种用于产生分别表示信息处理设备的多个状态并选择性地输出任何状态信号的状态信号的电路。 还提供了一种用于判断从状态信号发生电路选择输出的状态信号与由登记电路登记的微指令的条件字段的内容指定的条件之间的一致性以输出转移控制信号的电路。 利用这种布置，微程序计数器的地址字段可以根据分支控制信号被微指令的地址字段的内容替换。