A PROGRESSIVE START-UP CHARGE PUMP AND METHOD THEREFOR
    51.
    发明公开
    A PROGRESSIVE START-UP CHARGE PUMP AND METHOD THEREFOR 失效
    电荷泵渐进开始及其方法

    公开(公告)号:EP0925635A4

    公开(公告)日:2000-01-12

    申请号:EP97949816

    申请日:1997-11-29

    发明人: THOMSEN JOSEPH A

    摘要: A progressive start-up charge pump (10) that eliminates the start-up problems of p-channel charge pump stages (12) by starting the charge pump (10) one stage (12) at a time. The charge pump (10) has a plurality of charge pump stages (12) wherein each of the plurality of charge pump stages (12) are coupled to a successive charge pump stage (12) in a cascade mode. An enabling circuit (14) is coupled to each of the plurality of charge pump stages (12) for individually starting each of the plurality of charge pump stages (12) one charge pump stage (12) at a time starting with a last charge pump stage (12) and successively turning on a directly previous charge pump stage (12) until the first charge pump stage (12) is started. This will ensure that the voltage output node (12B) is at a greater potential than the voltage input node (12A) for each of the plurality of charge pump stages (12) during start-up.

    Voltage regulator for a cardiac pacemaker
    52.
    发明公开
    Voltage regulator for a cardiac pacemaker 失效
    稳压器用于心脏起搏器。

    公开(公告)号:EP0627241A3

    公开(公告)日:1995-02-08

    申请号:EP94202254.2

    申请日:1989-02-09

    申请人: INTERMEDICS INC.

    IPC分类号: A61N1/37 G05F3/02

    CPC分类号: A61N1/3708 A61N1/3704

    摘要: A cardiac pacemaker has a multiplexed switched capacitor amplifier (125) used to develop a first target level to regulate the level of the pacing stimulus, and a second target level for comparison with the supply voltage level of the pacemaker as a measure of the point at which the pacemaker requires replacement.

    PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS

    公开(公告)号:EP3985854A1

    公开(公告)日:2022-04-20

    申请号:EP21206900.9

    申请日:2014-01-10

    摘要: Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst / T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking / delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks.