公开(公告)号：EP2388962A1

公开(公告)日：2011-11-23

申请号：EP09827147.1

申请日：2009-09-17

Applicant: ZTE Corporation

Inventor： GUO, Xin ,  ZHAI, Hongjian ,  ZHOU, Chang ,  CHEN, Hongqi

IPC: H04L12/56

CPC classification number: H04J3/0673 ,  G06F1/12 ,  H04J3/0638 ,  H04J3/0658 ,  H04J3/0661 ,  H04J3/0667 ,  H04J3/0682 ,  H04L43/0852 ,  H04L43/106

Abstract: The present invention discloses a device and method for implementing a transparent clock. The device comprises: a clock module, a data identification module and a data correction module, wherein the clock module is connected with the data identification module and the data correction module respectively, and used for providing clock information to the data identification module and the data correction module; the data identification module is used for receiving data and acquiring current time information from the clock module; and the data correction module is connected with the data identification module, and is used for accumulating a positive or negative value of the current time information with the time information included in the data according to an outputting direction of the data and outputting the accumulated time information together with the data. By adopting the present invention, the residence time information of the data in the switching node is acquired by a hardware device, and the time information included in the data is corrected according to the residence time information, so that the transparent clock of the data can be effectively implemented, and the acquired residence time information is of a high precision and is acquired stably.

Abstract translation: 本发明公开了一种用于实现透明时钟的装置和方法。 该装置包括：时钟模块，数据识别模块和数据校正模块，其中时钟模块分别与数据识别模块和数据校正模块连接，用于向数据识别模块和数据提供时钟信息 校正模块; 数据识别模块用于从时钟模块接收数据和获取当前时间信息; 并且数据校正模块与数据识别模块连接，并且用于根据数据的输出方向与包括在数据中的时间信息一起积累当前时间信息的正值或负值，并输出累积时间信息 连同数据。 采用本发明，通过硬件设备获取切换节点中的数据的停留时间信息，根据停留时间信息对包含在数据中的时间信息进行修正，使得数据的透明时钟可以 有效实施，获得的停留时间信息高精度，稳定获取。

公开(公告)号：EP2255541A4

公开(公告)日：2011-09-28

申请号：EP09715895

申请日：2009-03-02

Applicant: AUDINATE PTY LTD

Inventor： WILLIAMS AIDAN ,  WITANA VARUNI ,  WESTENDORP JAMES ,  WHITE ANDREW

IPC: H04Q9/04 ,  H04J3/06 ,  H04W56/00 ,  H04W88/02

CPC classification number: H04J3/0632 ,  H04J3/0638 ,  H04J3/0664 ,  H04J3/0673 ,  H04L45/02 ,  H04L69/28

公开(公告)号：EP2076983A4

公开(公告)日：2011-05-11

申请号：EP06813047

申请日：2006-10-27

Applicant: ERICSSON TELEFON AB L M

Inventor： RUFFINI STEFAN

IPC: H04J3/06

CPC classification number: H04J3/0632 ,  H04J3/0664 ,  H04J3/0673

公开(公告)号：EP2297886A1

公开(公告)日：2011-03-23

申请号：EP08756803.6

申请日：2008-06-02

Applicant: TTTech Computertechnik AG ,  Honeywell International Inc.

Inventor： STEINER, Wilfried ,  BAUER, Günther ,  WÄCHTER, Matthias ,  PAULITSCH, Michael ,  HALL, Brendan

IPC: H04J3/06

CPC classification number: H04L67/1095 ,  H04J3/0641 ,  H04J3/0664 ,  H04J3/067 ,  H04J3/0673 ,  H04J3/0679

Abstract: A method for synchronizing local clocks in a distributed computer network includes a number of components that are connected to each other via bi-directional communication links. An a priori configured set of components generates synchronization messages and sends these messages to the network. An a priori configured set of components consumes the generated messages. One or more message-relaying components in between a component that generates a synchronization message and the component that consumes the message adds delay value to the message reflecting the delay imposed by the message-relaying component. A component that is configured to consume a synchronization message delays a received synchronization message upon reception for a duration that is calculated by an a priori configured value for the maximum transmission delay minus the value of the sum of all delay values added to the received message before further usage of the message in the synchronization process.

公开(公告)号：EP2273706A1

公开(公告)日：2011-01-12

申请号：EP09290522.3

申请日：2009-06-30

Applicant: Alcatel Lucent

Inventor： Bui, Dinh Thai ,  Le Pallec, Michel

IPC: H04J3/06 ,  H04L12/56 ,  H04L12/24

CPC classification number: H04J3/0673 ,  H04J3/0667 ,  H04L41/0803 ,  H04L49/90

Abstract: The invention proposes a network equipment (6) adapted to receive and forward data packets, said equipment comprising:
-a packet processing device (75);
-a communication interface (71, 73) connected to the packet processing device and adapted to be connected to a communication medium (21, 22), said communication interface comprising a buffer (72, 74) for storing data packets received from or to be transmitted to the communication medium;
-a control device (76) adapted to identify a synchronization packet stored in said buffer and belonging to a given synchronization packet stream, said control device being adapted to keep the synchronization packets of said synchronization packet stream stored inside the buffer during a predetermined period and to output said synchronization packets at the expiry of the predetermined period.

Abstract translation: 本发明提出一种适于接收和转发数据分组的网络设备（6），所述设备包括： - 分组处理设备（75）; - 连接到所述分组处理设备并且适于连接到通信介质（21,22）的通信接口（71,73），所述通信接口包括用于存储从或从其接收的数据分组的缓冲器（72,74） 传送到通信介质; - 适于识别存储在所述缓冲器中并属于给定同步分组流的同步分组的控制设备（76），所述控制设备适于在预定时段内将所述同步分组流的同步分组保持在所述缓冲器内， 以在预定时段期满时输出所述同步分组。

公开(公告)号：EP2106052A2

公开(公告)日：2009-09-30

申请号：EP09156122.5

申请日：2009-03-25

Applicant: NEC Corporation

Inventor： Saikusa, Naoki

IPC: H04J3/06 ,  H04L12/56

CPC classification number: H04L47/22 ,  H04J3/0661 ,  H04J3/0664 ,  H04J3/0673 ,  H04L47/10

Abstract: An exemplary object of the present invention lies in a point of providing a time stamp packet transmitting apparatus capable of transferring time information in a packet network without being effected by a periodic dispersion time of a delay. The time stamp packet transmitting apparatus of the present invention is for changing a sending time period of a time stamp packet for filing time information, and transmitting the time stamp packet at its changed sending time period to a time stamp packet receiving apparatus via a packet network. In the present invention, sending the time stamp packet at an arbitrary sending packet time period responding to a sending trigger, which is output from an arbitrary sending cycle generator, makes it possible to detect a periodic delay jitter frequency that occurs in appliances within the packet network, and to remove the corresponding frequency.

Abstract translation: 本发明的示例性目的在于提供一种能够在不受延迟的周期性分散时间影响的情况下在分组网络中传送时间信息的时间戳分组发送装置。 本发明的时间标签分组发送装置是用于改变用于归档时间信息的时间戳分组的发送时间段，并且经由分组网络将其改变的发送时间周期的时间戳分组发送到时间戳分组接收装置 。 在本发明中，响应于从任意发送周期发生器输出的发送触发的任意发送分组时间周期发送时间戳分组使得可以检测在分组内的设备中发生的周期性延迟抖动频率 网络，并删除相应的频率。

公开(公告)号：EP2053761A1

公开(公告)日：2009-04-29

申请号：EP07291285.0

申请日：2007-10-22

Applicant: Alcatel Lucent

Inventor： Fahldieck, Torsten, Dipl.-Ing.

IPC: H04B7/26

CPC classification number: H04W56/0045 ,  H04B7/022 ,  H04B7/2693 ,  H04J3/0664 ,  H04J3/067 ,  H04J3/0673 ,  H04L7/0041 ,  H04W48/16 ,  H04W72/005 ,  H04W72/1205 ,  H04W88/08 ,  H04W92/045

Abstract: The present invention provides a method of synchronizing a multicast and broadcast service packet flow on a wireless wideband system, comprising a core network coupled to a gateway, an MBS server coupled to said gateway and a plurality of base stations belonging to an MBS zone. The method comprises the steps of: receiving at least a first MBS packet belonging to the MBS packet flow for transmission to the MBS zone from the core network by the gateway; receiving at least a first sync packet containing a first time stamp by the gateway from the MBS server, the first time stamp being a summation of the time reference and a time offset, the time offset being a maximum delay between the MBS server and the first base station of the plurality of base stations, the first time stamp determining the first MBS packet transmission time; and sending at least the first MBS packet and at least the first sync packet to the plurality of base stations including the first base station by the gateway. The method further comprises comparing at least the first MBS packet transmission time with a plurality of predetermined transmission times of a plurality of downlink frames including a first predetermined transmission time of a first DL frame for identification of a matching between one of the predetermined transmission times of the plurality of downlink frames and the first MBS packet transmission time, by at least the first base station; allocating at least a portion of the first MBS packet into a first downlink frame having the first predetermined transmission time matching the first MBS packet transmission time, by at least the first base station.

Abstract translation: 本发明提供了一种在无线宽带系统上同步多播和广播服务分组流的方法，包括耦合到网关的核心网络，耦合到所述网关的MBS服务器和属于MBS区域的多个基站。 所述方法包括以下步骤：至少接收属于所述MBS分组流的第一MBS分组，以由所述网关从所述核心网传输到所述MBS区域; 从所述MBS服务器接收由所述网关至少包含第一时间戳的第一同步分组，所述第一时间戳是所述时间基准和时间偏移的和，所述时间偏移量是所述MBS服务器与所述第一时间戳之间的最大延迟 多个基站的基站，第一时间戳确定第一MBS分组传输时间; 以及至少将所述第一MBS分组和所述第一同步分组发送到由所述网关包括所述第一基站的所述多个基站。 该方法还包括将至少第一MBS分组传输时间与多个下行链路帧的多个预定传输时间进行比较，包括第一DL帧的第一预定传输时间，用于识别预定传输时间之一 所述多个下行链路帧和所述第一MBS分组传输时间至少由所述第一基站发送; 至少第一基站将第一MBS分组的至少一部分分配到具有与第一MBS分组传输时间相匹配的第一预定传输时间的第一下行链路帧。

公开(公告)号：EP2025104A2

公开(公告)日：2009-02-18

申请号：EP07811895.7

申请日：2007-05-16

Applicant: Symmetricom, Inc.

Inventor： DOWD, Gregory, Louis

IPC: H04L12/28 ,  H04J3/06

CPC classification number: H04J3/0673 ,  H04J3/0697 ,  H04L69/28

Abstract: Embodiments of the present invention set forth a method and system for reducing uncertainty in receive and transmit timestamps created by an NTP server. The uncertainty in the receive timestamps is removed by recording the time-of-arrival in the hardware clock of the NTP server before the incoming packets may be delayed by traversing the various layers of software in a timestamping system. The uncertainty in the transmit timestamps is removed by giving the outgoing packets a timestamp in the future using an estimate of the transmission latency calculated by the latency estimator filter. Subsequently, the actual time-of-departure is used to re-calculate and update the estimate of the transmission latency. In this fashion, superior control of the timestamping function may be implemented in existing NTP servers in a manner that retains interworking compatibility with the current NTP standards.

公开(公告)号：EP1919139A1

公开(公告)日：2008-05-07

申请号：EP06775448.1

申请日：2006-08-22

Applicant: Huawei Technologies Co., Ltd.

Inventor： QU, Zhijun

IPC: H04L12/56

CPC classification number: H04J3/0673 ,  H04J3/0697

Abstract: A system and method for realizing network synchronization by packet network mainly includes: restoring the clock signal from the superior processing equipment data link of the packet network, and sending it to the subordinate processing equipment; realizing the synchronization of said processing equipment based on said clock signal. It can realize the uniform timing of the whole network and change the IP network without the timing into the synchronous network, which is similarly with the circuit network, with high bandwidth. It can not only provide a circuit simulation service, but also a multi-service with high bandwidth.

Abstract translation: 一种分组网络实现网络同步的系统和方法，主要包括：恢复来自分组网络的上级处理设备数据链路的时钟信号，并发送给下属的处理设备; 基于所述时钟信号实现所述处理设备的同步。 它可以实现整个网络的统一时序，并且无需定时将IP网络转换为同步网络，这与电路网络类似，具有高带宽。 它不仅可以提供电路仿真服务，而且可以提供高带宽的多业务。

公开(公告)号：EP1717978A1

公开(公告)日：2006-11-02

申请号：EP06005405.3

申请日：2006-03-16

Applicant: Rockwell Automation Technologies, Inc.

Inventor： Balasubramanian, Sivaram ,  Moldovansky, Anatoly ,  Harris, Kendal R.

IPC: H04J3/06

CPC classification number: H04J3/0673 ,  H04J3/0664 ,  H04L12/4625

Abstract: A system and method for precisely synchronizing clocks in separate nodes (10, 11, 12, 13) on a communication network (15) is provided by adjusting timestamps and related data in network messages. A circuit (10a, 11a, 12a, 13a) will allow a daisy-chain connection of the nodes (10, 11, 12, 13) and will forward time synchronization frames while accounting for delays in a manner that does not use boundary clocks, but does not depart from the IEEE 1588 standard protocol. The delays will be added on the fly to synchronization packets and the IP checksum and frame CRC will be adjusted. Deterministic data delivery and redundant data paths are also provided in a full duplex Ethernet network.

Abstract translation: 一种用于在精确地分开的节点（10，11，12，13）的通信网络（15）上的时钟进行同步的系统和方法是通过调节时间戳和相关数据在网络消息中提供。 一种电路（10A，11A，12A，13A）允许节点的菊花链连接（10，11，12，13）和将转发时刻同步帧，而占的方式延迟并不使用边界时钟希望 但不从IEEE 1588标准协议离开。 该延迟将在飞行中同步数据包和IP校验和CRC帧添加将进行调整。 因此在全双工以太网网络提供的确定性数据传输和冗余数据路径。