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公开(公告)号：EP0213768A2
公开(公告)日：1987-03-11
申请号：EP86305967.1
申请日：1986-08-01
IPC分类号： G08C19/02
CPC分类号： G08C19/02
摘要： An on-line serial communication interface (24) effects interfacing between a digital circuit or communication device, such as a computer or hand held terminal, and a current loop which has lines for connecting a transmitter (10) to a power supply (16). The interface includes a diode (D1) connected in series with one of the lines (14) of the current loop. The diode (D1) is connected in parallel to a source and drain (34,36) of a field effect transistor (F1). A control gate (38) of the FET is connected to an output of a differential amplifier (32) which receives, at one input thereof, a digital voltage pulse signal from the digital circuit. Another input of the amplifier (32) is held at a selected voltage so that voltage pulses are outputted from the amplifier (32) when the digital circuit generates its voltage pulses. This turns the field effect transistor (F1) on and off in synchronism with the voltage pulses, thus cutting the diode (D1) in and out of series with the line (14). With the field effect transistor (F1) in its non-conducting off condition, the diode (D1) has a small voltage drop thereacross. This does not affect the current on the current loop. With the field effect transistor (F1) conducting and in its on state, the diode (D1) is cut out and its voltage drop is applied to the transmitter (10) which is connected to the current loop. Communication can thus be established with the transmitter (10) while avoiding any interruption in the current on the current loop.
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公开(公告)号：EP0212897A2
公开(公告)日：1987-03-04
申请号：EP86305965.5
申请日：1986-08-01
IPC分类号： G08C19/02
CPC分类号： G08C19/02
摘要： An on-line serial communication interface (22) effects interfacing between a transmitter (10) of a two-line current loop to a digital circuit, such as a computer or hand-held terminal which receives and processes digital voltage pulses. The interface (22) includes a comparator (32) having a non-inverting input connected by a capacitor (C 1) to one (14) of the current lines, and a inverting input connected to a source of small positive voltage. An output of the comparator (32) is connected to an input port of the digital device. The transmitter (10) modulates the current on the current loop by a small amount with respect to the analog current communicated by the transmitter (10). This generates voltage pulses in the capacitor (C 1) which are compared to the selected voltage and are amplified to form large voltage pulses used for digital communication with the digital circuit.
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公开(公告)号：EP0212896A2
公开(公告)日：1987-03-04
申请号：EP86305963.0
申请日：1986-08-01
IPC分类号： G08C19/02
摘要： A serial communication interface establishes communication between a microprocessor (28) of a transmitter (10) and a current loop (12, 14) powered by a power supply (16). The microprocessor (28) outputs (at 30) an analog signal corresponding to a process variable and also outputs (at 32) a serial communication voltage pulse signal. The analog signal is applied to a current regulating circuit (42) which draws current from the power supply (16) onto the current loop (12, 14) in an amount proportional to the process variable. A comparator (46) has one input connected to the microprocessor (28) for receiving the serial communication voltage pulse signal and another input (48) for receiving a fixed selected voltage ( 5v). The output of the comparator (46) is connected to an input of the current regulating circuit (42) in such a way that a signal from the comparator is summed with the analog signal. The output signal of the comparator (46) is modulated in synchronism with the voltage pulses and represents a fraction of the analog signal so that both signals can be supplied to the current loop (12, 14) simultaneously.
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74.发明公开
公开(公告)号：EP0101528A1
公开(公告)日：1984-02-29
申请号：EP82304374.0
申请日：1982-08-19
申请人： HONEYWELL INC.
CPC分类号： H04B3/548 , G08C19/02 , H04B2203/547 , H04B2203/5483
摘要： A data communication system uses a 2-wire transmitter 2 which adjusts the current through the pair of wires 17 between 4 and 20 mA to represent a process variable; this can be sensed by an analog-to-digital converter 70, across a resistor RO, feeding a display 74. A communication device 8 can interrupt the PV analog signalling for digital signalling. Device 8 draws a 16 mA current for 1 bit time, and this is sensed by transmitter 2, which ceases PV transmission. Device 8 then sends 1 or more bytes, by drawing 0 and 16 mA current pulses, which are sensed by transmitter 2. Transmitter 2 can then send data back to device 8 by raising its output to 20 mA, and dropping it to 4 mA for 1 bit time each, then transmitting the data as 1 or more bytes with logic levels 4 and 20 mA. A steady level of 4 mA for a predetermined period t is recognized by either device as the end of digital signalling, and the transmitter 2 resumes its analog PV output
摘要翻译： 数据通信系统使用2线制发射机2，其通过一对导线17调节在4和20mA之间的电流以表示过程变量; 这可以由模拟数字转换器70跨越电阻器RO感测，馈送显示器74.通信设备8可以中断用于数字信号的PV模拟信号。 器件8抽取16 mA电流1位时间，并由发射器2感测到，这样就停止了PV传输。 然后，设备8通过绘制由发射机2感测的0和16mA电流脉冲发送1个或多个字节。然后，发射器2可以通过将其输出提高到20mA并将其降低到4mA来将数据发送回设备8 每个1位时间，然后将数据作为1或更多字节发送，逻辑电平为4和20 mA。 在预定时段t内的4mA的稳定电平由任一装置识别为数字信令的结束，并且发射机2恢复其模拟PV输出。
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公开(公告)号：EP0021053A1
公开(公告)日：1981-01-07
申请号：EP80102867.1
申请日：1980-05-22
CPC分类号： H04L25/02 , H04B1/74 , Y10T307/445
摘要： Die Übertragungseinrichtung enthält eine Senderbaugruppe (A) mit mindestens einem Sender (1), der mit einem eingeprägten Strom (I) ein Signal an mehrere, räumlich getrennte Empfänger (5, 6, 7) überträgt. An den Ausgangsklemmen jedes Senders (1) ist eine Reihenschaltung von Schwellwertgliedern (2, 3, 4) angeschlossen, deren Anzahl der Anzahl der Empfänger (5, 6, 7) entspricht. Dabei ist jedem Empfänger (5, 6, 7) eingangsseitig ein Schwellwertglied (2, 3, 4) parallelgeschaltet. Die Empfänger sind dadurch eingangsseitig in Reihe geschaltet. Dadurch ist sichergestellt, daß alle Empfänger (5, 6, 7) von demselben Strom (I) durchflossen werden. Bei Ausfall einer Übertragungsleitung oder eines Empfängers (5, 6, 7) fließt der Strom (I) über das zugeordnete Schwellwertglied (2, 3, 4) weiter, so daß keine Unterbrechung der Signalübertragung zu den übrigen Empfängern auftritt.
摘要翻译： 发送装置包括发送器组件（A）与设有外加电流（I）至少一个发射器（1）的信号到多个空间上分离的接收器（5，6，7）发送。 在每个发射器（1），Schwellwertgliedern的串联电路的输出端子（2，3，4）连接在数到接收器的数量（6 5，7）。 在此情况下（4 2,3）是每个接收器（5，6，7）在输入侧并联连接的阈值器件。 接收机是由此串联连接的输入侧。 这确保了相同的电流（I）的所有接收器（5，6，7）流过它们。 在传输线或一接收器（5，6，7）故障的情况下，通过相关联的阈值构件流过电流（I）（2，3，4）还使得不发生在信号传输的中断的其他接收机。
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76.发明公开
公开(公告)号：EP4450995A1
公开(公告)日：2024-10-23
申请号：EP22926205.0
申请日：2022-12-08
发明人： PARK, Junsik
IPC分类号： G01R35/00 , G01R31/382 , G01R15/20 , G01R19/00 , G01R19/30 , G01R19/10 , G01R19/165 , G08C19/02 , G01R31/396 , G01R31/371
摘要： The present invention relates to a current sensor diagnosis method, and a current sensor diagnosis system and a battery system providing the method, and the current sensor diagnosis system of the present invention includes: a first current sensor; a second current sensor connected in series with the first current sensor; a communication unit configured to receive a first current value measured by the first current sensor and a second current value measured by the second current sensor; and a control unit configured to select a current section to which the first current value and the second current value belong among a plurality of current sections distinguished by a size of a current, calculate a difference value between the first current value and the second current value, compare the difference value with a section reference value corresponding to the selected current section, and diagnose a state of the first current sensor and the second current sensor.
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公开(公告)号：EP3752795B1
公开(公告)日：2024-06-19
申请号：EP19705729.2
申请日：2019-02-13
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公开(公告)号：EP4156142A1
公开(公告)日：2023-03-29
申请号：EP22181509.5
申请日：2022-06-28
申请人： INTEL Corporation
发明人： JULIATO, Marcio , AHMED, Shabbir , GUTIERREZ, Christopher , LESI, Vuk , SASTRY, Manoj , WANG, Qian
IPC分类号： G08C19/02
摘要： Systems, apparatuses, and methods to mitigate effects of glitch attacks on a broadcast communication bus are provided. The voltage levels of the communication bus are repeatedly sampled to identify glitch attacks. The voltage level on the communication bus can be overdriven or overwritten to either corrupt received messages or correct received messages.
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公开(公告)号：EP3686613B1
公开(公告)日：2023-03-01
申请号：EP20153860.0
申请日：2016-07-13
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