MULTI-CORE DEVICE WITH OPTIMIZED MEMORY CONFIGURATION

    公开(公告)号:EP3731086A1

    公开(公告)日:2020-10-28

    申请号:EP20174532.0

    申请日:2007-08-28

    申请人: SnapTrack, Inc.

    发明人: GRANDIN, Emmanuel

    IPC分类号: G06F9/445

    摘要: A multi-core device (D), for an electronic equipment (UE), comprises at least two cores (C1, C2) arranged to execute different softwares stored into storing means. At least one (C2) of these cores (C1, C2) is associated with i) a primary memory (PM2) of the RAM type, which is part of the memory means and arranged for durably storing, without power consumption, a software to be executed once it has been transferred and data associated with this software when it is executed, and ii) a memory interface (MI2) coupled to the primary memory (PM2) and arranged to allow this core (C2) to execute this software durably stored into the primary memory (PM2) and to access to the data associated with this software when it is executed.