公开(公告)号：EP2860690A8

公开(公告)日：2015-06-10

申请号：EP14182972.1

申请日：2014-08-31

申请人： Intel Corporation

发明人： Sathe, Rahul P. ,  Foley, Tim

IPC分类号： G06T1/60 ,  G06T15/00

CPC分类号： G06T15/005 ,  G06T1/60 ,  G06T2200/28

摘要： An apparatus may include an index buffer to store an index stream having a multiplicity of index entries corresponding to vertices of a mesh and a vertex cache to store a multiplicity of processed vertices of the mesh. The apparatus may further include a processor circuit, and a vertex manager for execution on the processor circuit to read a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream, and to remove a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value.

摘要翻译： 装置可以包括索引缓冲器，用于存储具有与网格的顶点对应的多个索引条目的索引流和用于存储网格的多个经处理的顶点的顶点高速缓存。 该装置还可以包括处理器电路和顶点管理器，用于在处理器电路上执行以读取包括多个比特流输入的参考比特流，每个比特流输入对应于索引输入的索引输入，并且移除处理过的顶点 当与所处理的顶点相对应的参考比特流输入项的值等于定义值时，从顶点高速缓冲存储器中选择输出。

公开(公告)号：EP2503505A4

公开(公告)日：2015-05-27

申请号：EP10831599

申请日：2010-11-17

申请人： NEC SOLUTION INNOVATORS LTD

发明人： YAMAJI JUNKO

IPC分类号： G06T3/60 ,  G06T1/60 ,  G06T3/40 ,  G09G5/00 ,  G09G5/36 ,  H04N1/387

CPC分类号： H04N1/3877 ,  G06T1/60 ,  G06T3/606 ,  G09G5/363 ,  G09G2320/0252 ,  G09G2360/121

公开(公告)号：EP2795896A4

公开(公告)日：2015-05-20

申请号：EP11878021

申请日：2011-12-21

申请人： INTEL CORP

发明人： FANG ZHEN ,  GUPTE NITIN B ,  JIANG XIAOWEI

IPC分类号： H04N5/91 ,  G06F13/16 ,  G06T1/60 ,  H04N7/24 ,  H04N9/804 ,  H04N19/426

CPC分类号： G06F13/1673 ,  G06T1/60 ,  H04N9/8042 ,  H04N19/428 ,  H04N19/44 ,  H04N19/91 ,  Y02D10/14

摘要： Systems and methods of operating a memory controller may provide for receiving a write request from a motion compensation module, wherein the write request includes video data. A compression of the video data may be conducted to obtain compressed data, wherein the compression of the video data is transparent to the motion compensation module. In addition, the compressed data can be stored to one or more memory chips. Moreover, a read request may be received, wherein stored data is retrieved from at least one of the one or more memory chips in response to the request. Additionally, a decompression of the stored data may be conducted to obtain decompressed data.

公开(公告)号：EP2860690A2

公开(公告)日：2015-04-15

申请号：EP14182972.1

申请日：2014-08-31

申请人： Intel IP Corporation

发明人： Sathe, Rahul P. ,  Foley, Tim

IPC分类号： G06T1/60 ,  G06T15/00

CPC分类号： G06T15/005 ,  G06T1/60 ,  G06T2200/28

摘要： An apparatus may include an index buffer to store an index stream having a multiplicity of index entries corresponding to vertices of a mesh and a vertex cache to store a multiplicity of processed vertices of the mesh. The apparatus may further include a processor circuit, and a vertex manager for execution on the processor circuit to read a reference bitstream comprising a multiplicity of bitstream entries, each bitstream entry corresponding to an index entry of the index stream, and to remove a processed vertex from the vertex cache when a value of the reference bitstream entry corresponding to the processed vertex is equal to a defined value.

摘要翻译： 设备可以包括索引缓冲器，用于存储索引流，该索引流具有对应于网格顶点和顶点高速缓存的多个索引条目，以存储网格的多个经处理的顶点。 该装置还可以包括处理器电路和顶点管理器，用于在处理器电路上执行以读取包括多个比特流条目的参考比特流，每个比特流条目对应于索引流的索引条目，并且移除经处理的顶点 当与所处理的顶点相对应的参考比特流条目的值等于定义的值时，从顶点高速缓存。

公开(公告)号：EP2089847B1

公开(公告)日：2014-08-20

申请号：EP06805179.6

申请日：2006-11-08

申请人： Intel Corporation

发明人： LI, Wenlong ,  LI, Eric

IPC分类号： G06T1/20 ,  G06T1/60 ,  H04N1/393 ,  G06T3/40

CPC分类号： G06T1/20 ,  G06T3/40

公开(公告)号：EP2698719A2

公开(公告)日：2014-02-19

申请号：EP10012115.1

申请日：2001-08-08

申请人： Aware, Inc.

发明人： Gut, Ron Abraham ,  Tzannes, Alexis Paul ,  Reiter, Edmund Campion

IPC分类号： G06F12/08 ,  G06F17/30 ,  G06T1/60

CPC分类号： G06T1/60 ,  G06F12/0802 ,  G06F12/0875 ,  G06F17/30067 ,  G06F2212/455

摘要： Methods and apparatus for constructing objects within a cache system thereby allowing the cache system to respond to requested objects that are not initially available within the cache system. One embodiment of the invention caches image files, where the images are divided into components and stored in a format that allows identification and access to the components. The cache system determines that an object, such as an image file, is missing from the cache memory, locates sufficient components from the cache memory and/or external storage, and constructs the object from the located components.

摘要翻译： 的方法和设备的高速缓存系统内构造对象，从而允许高速缓存系统对请求的对象响应确实是高速缓存系统内最初不可。本发明的一个实施方式缓存的图像文件，其中，所述图像被划分成的部件和存储在 格式确实允许识别和访问组件。 高速缓存系统的确定性地雷做反对，颜色：例如图像文件中，从高速缓冲存储器丢失，位于从高速缓冲存储器和/或外部存储足够的组件，并从所述定位的组件构造的对象。

公开(公告)号：EP2673746A1

公开(公告)日：2013-12-18

申请号：EP12705572.1

申请日：2012-02-10

申请人： Qualcomm Incorporated

发明人： SHARP, Colin ,  PFEFFER, Zachary Aaron ,  METZ, Eduardus A. ,  RIBBLE, Maurice

IPC分类号： G06T1/60

CPC分类号： G06T1/60 ,  G06F3/064 ,  G06F12/0802

摘要： In general, aspects of this disclosure describe example techniques for efficient storage of data of various data types for graphics processing. In some examples, a processing unit may assign first and second contiguous range of addresses for a first and second data type, respectively. The processing unit may store at least one of graphics data of the first or second data type or addresses of the graphics data of the first or second data type within blocks whose addresses are within the first and second contiguous range of addresses, respectively. The processing unit may store, in cache lines of a cache, the graphics data of the first data type, and the graphics data of the second data type.

公开(公告)号：EP2660774A1

公开(公告)日：2013-11-06

申请号：EP12166218.3

申请日：2012-04-30

申请人： BlackBerry Limited

发明人： Freyhult, Maria Christina Nathalie ,  Montan, Nils Johan Petter ,  Eriksson, Nils Jonas Leif

IPC分类号： G06T1/60 ,  G06T11/60 ,  G11B27/031

CPC分类号： G09G5/393 ,  G06T11/00 ,  G09G2340/02 ,  G09G2340/0407 ,  G09G2340/0492 ,  G09G2360/121 ,  G11B27/031 ,  H04N1/32106 ,  H04N2201/325

摘要： There is disclosed apparatus and a computer implemented method for processing a digital image. The method comprises maintaining ordered cached digital images arranged in a predetermined order. The ordered cached digital images comprise a base digital image and a subsequent plurality of modified cached digital images. Each modified cached digital image is associated with an image modification category. Each subsequent modified cached digital image is generated by performing image modification operations relating to its respective image modification category on the immediately preceding cached image in accordance with the predetermined order.

摘要翻译： 公开了一种用于处理数字图像的装置和计算机实现方法。 该方法包括维持以预定顺序布置的有序缓存的数字图像。 有序缓存的数字图像包括基本数字图像和随后的多个经修改的高速缓存的数字图像。 每个修改的缓存数字图像与图像修改类别相关联。 通过根据预定顺序执行与紧接在前的高速缓存图像上的其各自的图像修改类别相关的图像修改操作来生成每个后续修改的缓存数字图像。

公开(公告)号：EP2657905A1

公开(公告)日：2013-10-30

申请号：EP11851657.4

申请日：2011-12-21

申请人： Peking University Founder Group Co., Ltd ,  Beijing Founder Electronics Co., Ltd. ,  Peking University Founder R&D Center

发明人： JI, Yong

IPC分类号： G06T1/60

CPC分类号： G06K15/1836 ,  G06T11/40

摘要： Provided are a method for rasterizing of page digital images and a device thereof. The method comprises: analysing a page digital image to obtain basic information, positional information and rasterizing information of the image, with the basic information thereof including image data, image type, image width, image height and image bit depth (S10); decoding the data encoding type to obtain image data and save the same to a buffer (S20); acquiring the image data from the buffer, and using the image type, the image width, the image height, the image bit depth and the positional information of the image to rasterize the image data, so as to obtain a rasterized page dot matrix (S30). The solution reduces read-write operations for data files on disk during the rasterization of the digital image, and improves the rasterization efficiency of the digital image.

摘要翻译： 提供了一种用于光栅化页数字图像的方法及其装置。 该方法包括：分析页数字图像以获得图像的基本信息，位置信息和光栅化信息，其基本信息包括图像数据，图像类型，图像宽度，图像高度和图像比特深度（S10）; 解码数据编码类型以获得图像数据并将其保存到缓冲器（S20）; 从缓冲器获取图像数据，并使用图像类型，图像宽度，图像高度，图像位深度和图像的位置信息来对图像数据进行光栅化，以获得光栅化页面点阵（S30 ）。 该解决方案可在数字图像的光栅化过程中减少磁盘上数据文件的读写操作，并提高数字图像的光栅化效率。

公开(公告)号：EP2615578A1

公开(公告)日：2013-07-17

申请号：EP12194183.5

申请日：2012-11-26

申请人： FUJITSU LIMITED

发明人： Sugama, Yasushi

IPC分类号： G06T1/60

CPC分类号： G06T15/00 ,  G06T1/60

摘要： An image drawing apparatus includes a drawing position judging unit configured to judge a figure drawn on the scan line to be processed and extract each of vertexes constituting the judged figure, an vertex information reading unit configured to read vertex information, an image generating unit configured to generate graphics data of the scan line, and a line buffer configured to store the graphics data, wherein the vertex information reading unit includes a cache memory, a cache tag configured to store an address storing the vertex information when the vertex information is stored in the cache memory, and a control unit configured to refer to the cache tag, and read the vertex information from the address of the cache memory when the address is stored, and store the vertex information in the cache memory and store the address in the cache tag when the address is not stored.

摘要翻译： 图像绘制装置包括：绘制位置判断单元，被配置为判断在待处理的扫描线上画出的图形，并提取构成判断图形的每个顶点;顶点信息读取单元，被配置为读取顶点信息;图像生成单元，被配置为 生成扫描线的图形数据，以及被配置为存储图形数据的行缓冲器，其中顶点信息读取单元包括高速缓存存储器，缓存标签被配置为当顶点信息存储在存储器中时存储存储顶点信息的地址 高速缓冲存储器和配置为引用高速缓存标签的控制单元，并且当存储地址时从高速缓冲存储器的地址读取顶点信息，并将顶点信息存储在高速缓冲存储器中并将该地址存储在高速缓存标签中 当地址不存储时。