-
公开(公告)号:EP3447607B1
公开(公告)日:2021-05-12
申请号:EP18189266.2
申请日:2018-08-16
IPC分类号: G06F1/3225 , G06F1/3234 , G06F1/329 , G06F13/16 , G06F13/20 , G06F13/40
-
公开(公告)号:EP3046109B1
公开(公告)日:2020-10-28
申请号:EP14844547.1
申请日:2014-08-22
-
公开(公告)号:EP2684136B1
公开(公告)日:2020-04-08
申请号:EP11860316.6
申请日:2011-09-26
发明人: HASHIMOTO, Daisuke
IPC分类号: G06F3/06 , G06F12/02 , G06F12/0804 , G06F12/0868 , G11C11/56 , G11C16/04
-
-
-
公开(公告)号:EP3495955A3
公开(公告)日:2019-07-10
申请号:EP18189925.3
申请日:2018-08-21
发明人: Margetts, Julien
IPC分类号: G06F11/10
摘要: A data storage device comprises a nonvolatile semiconductor storage array containing data, a controller in communication with the nonvolatile semiconductor storage array, and a buffer containing RAID units, the RAID units being in communication with the nonvolatile semiconductor storage array via the controller. The controller is configured to receive write requests from a host device, and accumulate first data relating to the write requests in the RAID units. The controller is also configured to, concurrently, transfer the first data contained in the RAID units to the nonvolatile semiconductor storage array, calculate parity values of the first data contained in the RAID units, each parity value relating to each write request, and accumulate the parity values in a context identifier buffer. The controller is further configured to associate context identifiers with the parity values, and store the parity values and the context identifiers in the nonvolatile semiconductor storage array.
-
公开(公告)号:EP2702721B1
公开(公告)日:2019-06-26
申请号:EP12775943.9
申请日:2012-03-22
发明人: KATO, Taku , NAGAI, Yuji , MATSUSHITA, Tatsuyuki
-
公开(公告)号:EP2186004B1
公开(公告)日:2018-06-06
申请号:EP08791594.8
申请日:2008-07-17
IPC分类号: G06F11/10
CPC分类号: H03M13/2906 , G06F11/10 , G06F11/1004 , G06F11/1008 , G06F11/1068 , G06F13/1673 , G06F13/4068 , G11C29/52 , H03M13/03 , H03M13/29 , H03M13/35 , H03M13/6561 , Y02D10/14 , Y02D10/151
摘要: A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.
-
公开(公告)号:EP3486910B1
公开(公告)日:2021-06-30
申请号:EP16908828.3
申请日:2016-07-13
发明人: SUGAHARA, Akio , NAGAI, Yuji
-
公开(公告)号:EP3541019B1
公开(公告)日:2021-03-03
申请号:EP18193439.9
申请日:2018-09-10
发明人: YAMAURA, Takahiro , GOTO, Masataka
-
-
-
-
-
-
-
-
-