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公开(公告)号：EP0720365B1
公开(公告)日：2003-07-02
申请号：EP95309359.8
申请日：1995-12-21
申请人： SONY CORPORATION
发明人： Oguro, Masaki
IPC分类号： H04N5/926
CPC分类号： G11B27/107 , G11B15/087 , G11B15/1875 , G11B27/005 , G11B27/3063 , G11B2220/90 , H04N5/78266 , H04N5/783 , H04N5/9208 , H04N5/9264 , H04N9/7921
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公开(公告)号：EP0725399B1
公开(公告)日：2003-01-08
申请号：EP96300629.1
申请日：1996-01-30
申请人： SONY CORPORATION
发明人： Kawamura, Makoto, c/o Intellectual Property Div. , Fujinami, Yasushi, c/o Intellectual Property Div.
CPC分类号： H04N5/783 , G11B27/10 , G11B27/105 , G11B27/11 , G11B27/3027 , G11B2220/20 , G11B2220/65 , H04N5/85 , H04N9/8042
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3.发明授权Signal recovery and error detection means for an information recording medium 失效信号恢复和误差检测器，用于信息记录介质
公开(公告)号：EP0814462B1
公开(公告)日：2002-09-18
申请号：EP97303477.0
申请日：1997-05-21
申请人： SONY CORPORATION
CPC分类号： G11B7/0948 , G11B7/08541
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公开(公告)号：EP0730378B1
公开(公告)日：2002-07-31
申请号：EP96301307.3
申请日：1996-02-27
申请人： SONY CORPORATION
IPC分类号： H04N7/01
CPC分类号： H04N9/8042 , H04N7/0112 , H04N7/012 , H04N19/85 , Y10S348/911
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公开(公告)号：EP0705040B1
公开(公告)日：2002-03-20
申请号：EP95306815.2
申请日：1995-09-27
申请人： SONY CORPORATION
发明人： Suzuki, Kazuhiro, c/o Int. Property Division , Mitsuhashi, Satoshi, c/o Int. Property Division , Ando, Yuji, c/o Int. Property Division
IPC分类号： H04N7/30
CPC分类号： H04N19/87 , H04N19/107 , H04N19/114 , H04N19/124 , H04N19/14 , H04N19/142 , H04N19/146 , H04N19/149 , H04N19/15 , H04N19/172 , H04N19/176 , H04N19/177 , H04N19/179 , H04N19/60 , H04N19/61
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公开(公告)号：EP0676726B1
公开(公告)日：2001-06-20
申请号：EP95302301.7
申请日：1995-04-06
发明人： Yutaka, Teiji, c/o Sony Corp. , Suzuoki, Masakazu, c/o Sony Corp. , Furuhashi, Makoto, c/o Sony Corp. , Tanaka, Masayoshi, c/o Sony Corp.
CPC分类号： G06T15/10
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公开(公告)号：EP0618577B1
公开(公告)日：2001-05-23
申请号：EP94302327.5
申请日：1994-03-31
申请人： SONY CORPORATION
CPC分类号： G11B20/1809 , G11B20/1879 , H04N5/9264 , H04N5/945
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公开(公告)号：EP0798867A3
公开(公告)日：2000-09-27
申请号：EP97302112.4
申请日：1997-03-26
申请人： SONY CORPORATION
发明人： Wakamatsu, Masataka
IPC分类号： H03M13/00
CPC分类号： H03M13/2703 , H03M13/3961 , H03M13/4107 , H03M13/4161
摘要： Survivor sequences information is supplied to a RAM 61-1 and a RAM 61-2 as an input Din. The RAM 61-1 and the RAM 61-2 perform an interleaving operation and store the survivor sequences information alternately in accordance with a clock CK1 and a clock CK2 differing in phase from the clock CK1 by half a period. The phases of the clock CK1 and the phase of the clock CK2 are delayed by half a period when a write operation is switched to a read operation with data being outputted at a selector 62 in an appropriate order accordingly. Traced-back data is then inputted from terminal A and terminal B to the selector 62 and outputted from a terminal X after one of these items of data has been selected at a prescribed timing.
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公开(公告)号：EP0711085B1
公开(公告)日：2000-09-27
申请号：EP95307851.6
申请日：1995-11-03
申请人： SONY CORPORATION
发明人： Kanota, Keiji, c/o Intellectual Property Div. , Ezaki, Tadashi, c/o Intellectual Property Div. , Oguro, Masaki, c/o Intellectual Property Div. , Yanagihara, Naofumi, c/o Intellectual Property Div , Fukuda, Hiroshi, c/o Intellectual Property Div
IPC分类号： H04N9/804
CPC分类号： G11B27/036 , G11B20/1208 , G11B23/08714 , G11B27/11 , G11B27/3027 , G11B27/3063 , G11B2220/655 , H04N5/78266 , H04N7/007 , H04N7/087 , H04N9/8047 , H04N9/8063 , H04N9/8205 , H04N9/8233 , H04N9/832 , H04N9/885
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公开(公告)号：EP0592196B1
公开(公告)日：2000-05-10
申请号：EP93307916.2
申请日：1993-10-06
申请人： SONY CORPORATION
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