Digital Communication Systems
    1.
    发明公开
    Digital Communication Systems 失效
    数字社区系统。

    公开(公告)号:EP0298674A2

    公开(公告)日:1989-01-11

    申请号:EP88306061.8

    申请日:1988-07-04

    IPC分类号: H04Q7/02

    CPC分类号: H04B7/2643

    摘要: A digital communication system comprises receiving and transmitting apparatus at each end of a communication link. A call is set up from either end of the link by first transmitting a paging signal to initiate the link and to identify the address of the intended recipient equipment. A paging signal has a unique carrier modulation envelope and comprises packets of data interleaved with periods of unmodulated carrier such that the presence of the paging signal may be identified by a suitable modulation envelope detector (22, 24, 26) without recourse to decoding the data contained within the paging signal.

    摘要翻译: 数字通信系统包括在通信链路的每一端的接收和发送设备。 通过首先发送寻呼信号以发起链路并识别预期接收方设备的地址,从链路的任一端建立呼叫。 寻呼信号具有唯一的载波调制包络,并且包括与未调制载波的周期交织的数据分组,使得可以由合适的调制包络检测器(22,24,26)识别寻呼信号的存在,而无需求解数据 包含在寻呼信号内。

    Phase-locked digital synthesiser
    2.
    发明公开
    Phase-locked digital synthesiser 失效
    相锁数字合成器

    公开(公告)号:EP0211594A3

    公开(公告)日:1988-11-23

    申请号:EP86305802

    申请日:1986-07-29

    IPC分类号: H03L07/18 H03L07/10

    CPC分类号: H03L7/187 H03L7/1972

    摘要: A phase-locked digital synthesiser comprises a voltage-­controlled oscillator (6) supplying a frequency divider (7) the output of which is fed to a phase-sensitive detector (9) also receiving an input from a reference oscillator (10). The output of the detector (9) is fed back by a feedback loop to the voltage-controlled oscillator (6) to achieve phase-locking. The divider (7) receives an input from a logic circuit (8) to control the division ratio of the divider (7), the logic circuit being prompted by a control signal which is also used to select one of a plurality of loop filters (12,13) connected for selectable use in the feedback loop from the detector (9) to the voltage controlled oscillator (6), the selected loop filter being appropriate to the prompted division ratio. Other embodiments include compensating means to correct a loop phase error arising from a change in the division ratio.

    Phase-locked digital synthesiser
    3.
    发明公开
    Phase-locked digital synthesiser 失效
    在锁相环数字频率合成器。

    公开(公告)号:EP0211594A2

    公开(公告)日:1987-02-25

    申请号:EP86305802.0

    申请日:1986-07-29

    IPC分类号: H03L7/18 H03L7/10

    CPC分类号: H03L7/187 H03L7/1972

    摘要: A phase-locked digital synthesiser comprises a voltage-­controlled oscillator (6) supplying a frequency divider (7) the output of which is fed to a phase-sensitive detector (9) also receiving an input from a reference oscillator (10). The output of the detector (9) is fed back by a feedback loop to the voltage-controlled oscillator (6) to achieve phase-locking. The divider (7) receives an input from a logic circuit (8) to control the division ratio of the divider (7), the logic circuit being prompted by a control signal which is also used to select one of a plurality of loop filters (12,13) connected for selectable use in the feedback loop from the detector (9) to the voltage controlled oscillator (6), the selected loop filter being appropriate to the prompted division ratio. Other embodiments include compensating means to correct a loop phase error arising from a change in the division ratio.

    Digital Communication Systems
    5.
    发明公开
    Digital Communication Systems 失效
    数字通信系统

    公开(公告)号:EP0298674A3

    公开(公告)日:1990-05-02

    申请号:EP88306061.8

    申请日:1988-07-04

    IPC分类号: H04Q7/02

    CPC分类号: H04B7/2643

    摘要: A digital communication system comprises receiving and transmitting apparatus at each end of a communication link. A call is set up from either end of the link by first transmitting a paging signal to initiate the link and to identify the address of the intended recipient equipment. A paging signal has a unique carrier modulation envelope and comprises packets of data interleaved with periods of unmodulated carrier such that the presence of the paging signal may be identified by a suitable modulation envelope detector (22, 24, 26) without recourse to decoding the data contained within the paging signal.

    Burst-mode two-way communications system
    6.
    发明公开
    Burst-mode two-way communications system 失效
    BURST模式两路通信系统

    公开(公告)号:EP0213780A3

    公开(公告)日:1988-11-30

    申请号:EP86306015

    申请日:1986-08-05

    IPC分类号: H04B07/26 H04B07/08

    CPC分类号: H04B7/0802

    摘要: A burst-mode two-way radio communications system in which transceivers (26) at a base station (20) share a common antenna arrangement having two or more branches (22, 24) and antenna branch selection is made by an operative base station transceiver having regard to the strength of the signal received from a portable transceiver with which communication is established, antenna branch selection being effected by a switch (30) controlled by a switch controller (28), such as an OR-selector, which is connected to all the base station transceivers in order to receive from any such transceiver a switching instruction signal.