VERTICAL METAL SENSING METHOD FOR DC-DC CONVERTER

    公开(公告)号:EP4297260A3

    公开(公告)日:2024-03-13

    申请号:EP23208147.1

    申请日:2023-02-22

    摘要: In a DC-DC converter (200'), a layout is designed to enable utilization of the conductive trace connecting the converter output node (N2) to an output bump (BB1, BB2) at which the load (RL, CL) is attached as a sense resistor (Rs). The layout forces the output current down into lower metallization levels (201) of an interconnect layer reaching the converter output node (N2) before the output current flows up into this conductive trace (212) and out through the output bump (BB1, BB2). The conductive trace (212) includes resistive pillars connected in parallel or series between the lower metallization levels (201) and a top metallization layer (207c) of the conductive trace (212), with these resistive pillars being substantially greater in resistance than the lower metallization levels (201) and the top metallization layer (207c) of the conductive trace (212).

    DYNAMIC NOISE SAMPLING FOR UNSPECIFIED DISPLAY NOISE

    公开(公告)号:EP4266299A1

    公开(公告)日:2023-10-25

    申请号:EP23164732.2

    申请日:2023-03-28

    IPC分类号: G09G3/20 G01R29/26 G06F3/044

    摘要: A method includes: displaying, an image on a display by sequentially displaying a plurality of frames of the image, the plurality of frames including a first frame and second frame; performing a first noise sampling scan at a plurality of frequencies at a first time location within a first frame; determining a first frequency from the plurality of frequencies with the lowest noise; performing a first mutual sensing scan at the first frequency; performing, a second noise sampling scan at the plurality of frequencies at a second time location within a second frame of the plurality of frames, the second time location being a different frame location than the first time location; determining a second frequency from the plurality of frequencies with the lowest noise, the second frequency being different from the first frequency; and performing, a second mutual sensing scan at the second frequency.

    LDO FREE WIRELESS POWER RECEIVER HAVING RECTIFIER

    公开(公告)号:EP4213341A1

    公开(公告)日:2023-07-19

    申请号:EP23151492.8

    申请日:2023-01-13

    发明人: GUEDON, Yannick

    摘要: A bridge rectifier and associated control circuitry collectively form a "regtifier" which rectifies an input time varying voltage and regulates the rectified output voltage produced without the use of a traditional voltage regulator. To accomplish this, the gate voltages of transistors of the bridge rectifier that are on during a given phase may be modulated via analog control (to increase the on-resistance of those transistors) or via pulse width modulation (to turn off those transistors prior to the end of the phase). The transistors of the bridge rectifier that would otherwise be off during a given phase may be turned on to help dissipate excess power and thereby regulate the output voltage. This modulation is based upon both a voltage feedback signal and a current feedback signal.

    ADAPTIVE BOOSTING OF RECTIFIED VOLTAGE IN A WIRELESS CHARGING SYSTEM

    公开(公告)号:EP4160849A1

    公开(公告)日:2023-04-05

    申请号:EP22192216.4

    申请日:2022-08-25

    IPC分类号: H02J3/32 H02J50/10 H02M7/217

    摘要: A wireless power receiver (13') includes a rectifier with first (N2) and second (N4) inputs coupled to first and second terminals of a receiver coil (Ls), and having a first output (N1) coupled to ground and a second output (N3) at which a rectified voltage (Vrect) is produced. A first switch (SW1) is coupled between the second input (N4) and ground, and is controlled by a first gate voltage (Vgatel) generated at a first node (N5). A second switch (SW2) is coupled between the first node (N5) and ground, and is controlled by a second gate voltage (Vgate2). The first gate voltage (Vgatel) closes the first switch (SW1) to couple the second input (N4) to ground when the rectified voltage (Vrect) is less than a threshold voltage, boosting the rectified voltage. The second gate voltage (Vgate2) closes the second switch (SW2) to cause the second gate voltage (Vgate2) to be pulled to ground when the rectified voltage (Vrect) is greater than the threshold voltage, limiting the boosting of the rectified voltage.

    DESIGN AND METHOD FOR INTEGRATING A DISPENSABLE LIGHT TRANSMISSIBLE APERTURE IN THE CAP OF A THIN LIGHT SENSOR MODULE

    公开(公告)号:EP3991938A1

    公开(公告)日:2022-05-04

    申请号:EP21195431.8

    申请日:2021-09-08

    IPC分类号: B29C43/18 B29C43/36 B29C43/52

    摘要: A method of making a light sensor module includes connecting a light sensing circuit to an interconnect on a substrate, and forming a cap. The cap is formed by producing a cap substrate from material opaque to light to have an opening formed therein, placing the cap substrate top-face down, dispensing a light transmissible material into the opening, compressing the light transmissible material using a hot tool to thereby cause the light transmissible material to fully flow into the opening to form at a light transmissible aperture, and placing the cap substrate into a curing environment. A bonding material is dispensed onto the substrate. The cap is picked up and placed onto the substrate positioned such that the light transmissible aperture is aligned with the light sensing circuit, with the bonding material bonding the cap to the substrate to thereby form the light sensor module.

    HARDWARE AND METHOD FOR ENHANCED WIRELESS RECEIVER OUTPUT POWER

    公开(公告)号:EP3923445A1

    公开(公告)日:2021-12-15

    申请号:EP21177794.1

    申请日:2021-06-04

    发明人: GUEDON, Yannick

    摘要: A power transmission system includes at least one wireless power transmission circuit. A first wireless power reception circuit includes a first circuit comparing a reference voltage to a feedback voltage representing an output voltage produced from received power and delivered to an output node, and adjusting a first control terminal of a device supplying a first rectified voltage until the feedback and reference voltages are equal. A second wireless power reception circuit includes a second circuit modifying a control terminal of a device sourcing a second rectified current produced from received power to the output node, based upon comparison of a reference current to a current representative of the second rectified current. Control circuitry adjusts the reference current until a first rectified voltage generated by the first wireless power reception circuit and a second rectified voltage generated by the second wireless power reception circuit are equal.

    AMPLITUDE-SHIFT KEYING DEMODULATION FOR WIRELESS CHARGERS

    公开(公告)号:EP3817238A1

    公开(公告)日:2021-05-05

    申请号:EP20204110.9

    申请日:2020-10-27

    发明人: GUEDON, Yannick

    IPC分类号: H04B5/00 H04B5/02 H04L27/02

    摘要: A power transmitter includes: a first switch coupled between a first node and a reference voltage node; a second switch configured to be coupled between a power supply and the first node; a coil and a capacitor coupled in series between the first node and the reference voltage node; a first sample-and-hold (S&H) circuit having an input coupled to the first node; and a timing control circuit configured to generate a first control signal, a second control signal, and a third control signal that have a same frequency, where the first control signal is configured to turn ON and OFF the first switch alternately, the second control signal is configured to turn ON and OFF the second switch alternately, and where the third control signal determines a sampling time of the first S&H circuit and has a first pre-determined delay from a first edge of the first control signal.