公开(公告)号：EP4471842A3

公开(公告)日：2025-02-26

申请号：EP24206985.4

申请日：2018-06-28

Applicant: DENSO CORPORATION

Inventor： ARAI, Shunsuke ,  HIRAMITSU, Shinji ,  NAGASE, Takuo

IPC: H01L25/07 ,  H01L25/18 ,  H01L23/495 ,  H02M7/00 ,  H02M1/088 ,  H01L23/433 ,  H01L23/373 ,  H01L23/00 ,  H01L23/498

Abstract: In a semiconductor module (10), multiple switching elements (12, 13, 34) are connected in parallel with each other. A first current path (25, 26) is formed between each of first main electrodes (14b) and a first main terminal (21), and a second current path (27, 28) is formed between each of second main electrodes and a second main terminal (22). When a self-inductance of an arbitrary current path, which is the second current path of any of the switching elements is denoted as Lsn, a mutual inductance of the arbitrary current path and other current paths except for the arbitrary current path is denoted as Mn, and a sum of Lsn and Mn is denoted as Ln, the switching elements and the current paths are disposed in such a manner that Ln of each of the switching elements is equal to each other.

公开(公告)号：EP3834285B1

公开(公告)日：2024-12-25

申请号：EP19848258.0

申请日：2019-08-09

Inventor： SLOBODOV, Ilia ,  ZIEMBA, Timothy ,  MILLER, Kenneth ,  PRAGER, James

IPC: H01J37/32 ,  H03K3/53 ,  H03K3/57 ,  H02M3/335 ,  H02M3/00 ,  H02M1/088

公开(公告)号：EP4425778A1

公开(公告)日：2024-09-04

申请号：EP21962093.7

申请日：2021-11-11

Applicant: Shaanxi Reactor Microelectronics Co., Ltd.

Inventor： HE, Shibao ,  WANG, Jiawei ,  XIA, Qin

IPC: H02M3/156 ,  H02M1/088 ,  H03K17/042

Abstract: The present invention discloses a circuit and a method for improving the response speed of load switching, a switch unit comprising a switch circuit and a switch unit control part; the switch circuit comprises a first power tube and a second power tube connected in series; a switch filter unit, comprising a working status judgment module, a first switch, a second switch, a third switch, a first inductor and a second inductor; the working status judgment module is used to determine whether the system is in startup, or normal operation, or load switching status, and make the system turn on or close said first switch, second switch, and third switch in different situations, so as to obtain a suitable inductor operation according to the different inductances of first inductor and second inductor and improve system response speed. The invention can improve the response speed of the system and make the ripple smaller.

公开(公告)号：EP4376280A1

公开(公告)日：2024-05-29

申请号：EP22210035.6

申请日：2022-11-28

Applicant: VOLVO CAR CORPORATION

Inventor： MADEMLIS, Georgios ,  ORBAY, Raik ,  TORSTENSSON, Per

IPC: H02M1/088 ,  H02M1/00 ,  H02M1/08 ,  H02M7/483 ,  H02M7/487 ,  H02M7/5387

CPC classification number: H02M1/0029 ,  H02M7/5387 ,  H02M7/487 ,  H02M7/4835 ,  H02M1/08

Abstract: The disclosure relates to a method for operating a gate driver system (20) for a multi-level converter system (14). The multi-level converter system (14) has a number of cascaded switching modules (24, 26, 30, 32). The gate driver system (20) comprises at least two gate driver units (36, 38, 40, 42), each being configured to operate an associated switching module (24, 26, 30, 32). The method comprises providing at least a first subset (A) and a second subset (B) of gate driver units (36, 38, 40, 42) and assigning a first switching speed to the gate driver units (36, 38, 40, 42) of the first subset (A) and a second switching speed to the gate driver units (36, 38, 40, 42) of the second subset. A first switching control signal is provided to the switching modules (24, 26, 30, 32) being associated with the gate driver units (36, 38, 40, 42) of the first subset (A) and a second switching control signal is provided to the switching modules (24, 26, 30, 32) being associated with the gate driver units (36, 38, 40, 42) of the second subset (B). Moreover, a corresponding data processing apparatus (44), computer program (52), and computer-readable storage medium (50) are described. Furthermore, a gate driver system (20), a multi-level converter system (14), and a vehicle are presented.

公开(公告)号：EP4366116A1

公开(公告)日：2024-05-08

申请号：EP22903247.9

申请日：2022-11-28

Applicant: CRM ICBG (WUXI) CO., LTD.

Inventor： QI, Zhengkun ,  LUO, Bingyin ,  YOU, Yong

IPC: H02J7/00 ,  H02H7/18 ,  H02M1/088

CPC classification number: Y02E60/10 ,  H02M1/088 ,  H02J7/00 ,  H02H7/18

Abstract: A battery protection chip, a battery system, and a battery protection method. The battery protection chip (10) comprises: a discharge voltage limiting detection circuit (11) used for detecting a discharge drive signal output by a battery protection chip of a previous level, identifying the level of the discharge drive signal according to the current flow of a discharge detection signal of a battery protection chip of a current level, and reducing a high-low level conversion window voltage of the discharge drive signal; and a charge voltage limiting detection circuit (12) used for detecting a charge drive signal output by the battery protection chip of the previous level, identifying the level of the charge drive signal according to the current flow of a charge detection signal of the battery protection chip of the current level, and reducing a high-low level conversion window voltage of the charge drive signal. The battery protection chip solves the problems of high costs, difficulty in determining the ratio of voltage division by a resistor, and large power consumption during battery protection by existing cascaded battery protection chips.

公开(公告)号：EP4350998A1

公开(公告)日：2024-04-10

申请号：EP23196729.0

申请日：2023-09-12

Applicant: Volkswagen Aktiengesellschaft

Inventor： Arnaout, Samy

IPC: H03K17/30 ,  H03K17/0812 ,  H03K17/12 ,  H03K17/284 ,  H03K17/08 ,  H03K17/06 ,  H03K17/16 ,  H02M1/088 ,  H03K17/14

Abstract: Die Erfindung betrifft ein Verfahren zum Betreiben einer Halbbrückenschaltung (2) aus diskreten MOSFETs (T1 - T4), wobei die Halbbrückenschaltung (2) mindestens zwei parallelgeschaltete High-Side-Schalter und mindestens zwei parallelgeschaltete Low-Side-Schalter aufweist, wobei die MOSFETs (T1 - T4) mittels mindestens eines Gate-Treiberbausteins (3, 4) angesteuert werden, wobei die Gate-Anschlüsse (G1 - G4) der MOSFETs (T1 - T4) einzeln herausgeführt sind, wobei den Gate-Anschlüssen (G1 - G4) zuund einstellbare Widerstände (R) zugeordnet sind, wobei beim Einschalten der High-Side-Schalter die Gate-Source-Spannungen an den Low-Side-Schaltern und beim Einschalten der Low-Side-Schalter die Gate-Source-Spannungen an den High-Side-Schaltern erfasst werden, wobei die Gate-Source-Spannungen der High-Side-Schalter untereinander und die Gate-Source-Spannungen der Low-Side-Schalter untereinander verglichen werden, um ein jeweiliges PTO-Verhalten zu bestimmen, wobei bei einem abweichenden Verhalten mindestens ein Widerstand (R) verändert und/oder zeitlich verändert zugeschaltet wird, um das PTO-Verhalten anzugleichen, sowie eine Vorrichtung (1).

公开(公告)号：EP3750235B1

公开(公告)日：2024-03-20

申请号：EP19700276.9

申请日：2019-01-09

Inventor： SHOUSHA, Mahmoud ,  HAUG, Martin

IPC: H02M7/217 ,  H02J7/00 ,  H02J50/00 ,  H02M1/088 ,  H02M3/07 ,  H02M1/00

公开(公告)号：EP4191852A1

公开(公告)日：2023-06-07

申请号：EP22211344.1

申请日：2022-12-05

Applicant: Commissariat à l'Énergie Atomique et aux Énergies Alternatives

Inventor： DESPESSE, Ghislain ,  TOUHAMI, Mustapha ,  BRETON, Valentin

IPC: H02M1/00 ,  H02M1/088 ,  H02M3/00 ,  H02M3/335

Abstract: Ce convertisseur d'énergie électrique (10), comprend :
- un premier pont (30) comportant au moins une première branche de commutation (32) entre deux bornes (34) d'une tension d'entrée (V in ) et incluant deux premiers interrupteurs (36) reliés en un premier point milieu (38) ;
- un deuxième pont (40) comportant au moins une deuxième branche de commutation (42) entre deux bornes (44) d'une tension de sortie (V out ) et incluant deux deuxièmes interrupteurs (46) reliés en un deuxième point milieu (48) ;
- au moins un ensemble piézoélectrique (12) connecté entre des premier (38) et deuxième (48) points milieux respectifs ; et
- au moins un circuit d'aide à la commutation (50) connecté à un point milieu respectif et configuré pour, via la circulation d'un courant préalablement reçu, décharger une capacité parasite d'un interrupteur du pont auquel il est connecté, et respectivement charger une capacité parasite d'un autre interrupteur dudit pont.

公开(公告)号：EP4120567A1

公开(公告)日：2023-01-18

申请号：EP22163945.3

申请日：2022-03-23

Applicant: Infineon Technologies Austria AG

Inventor： YELAMOS RUIZ, Pablo ,  PRABHALA, Venkata Anand

IPC: H03K17/16 ,  H03K17/12 ,  H03K17/284 ,  H02M1/00 ,  H02M1/32 ,  H02M1/36 ,  H02M7/5387 ,  H02M1/088

Abstract: A gate driver circuit (116) includes at least one driver configured to generate a first gate control signal (A) for a first power disconnect switch (112) and a second gate control signal (B) for a second power disconnect switch (114) in parallel with the first power disconnect switch, and logic (118) configured to implement a delayed turn on time for the second gate control signal compared to the first gate control signal such that the first power disconnect switch turns on before the second power disconnect switch when powering up a load (108) coupled to the first and the second power disconnect switches. The gate driver circuit logic may also be configured to implement a delayed turn off time such that the first power disconnect switch turns off before the second power disconnect switch when powering down the load. Corresponding power conversion circuits, electronic systems, and methods of power disconnect switch control are also described.

公开(公告)号：EP4070456A1

公开(公告)日：2022-10-12

申请号：EP20817289.0

申请日：2020-12-01

Applicant: Robert Bosch GmbH

Inventor： ERCKERT, Ricardo ,  BARNER, Alexander ,  ROSAHL, Thoralf

IPC: H03K17/16 ,  H02M1/00 ,  H02M1/088 ,  H03K17/10 ,  H03K17/12