公开(公告)号：EP0203700A3

公开(公告)日：1987-09-23

申请号：EP86302923

申请日：1986-04-18

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Williams, Bertrand Jeffery ,  Wilson, Stanley

IPC分类号： H03K19/092 ,  H03K19/013

CPC分类号： H03K3/288 ,  H03K19/0136 ,  H03K19/01812

摘要： A logic level translator having high switching speeds for converting ECL logic levels into TTL logic levels includes a pair of input transistors for receiving ECL input logic level signals and an output transistor for generating TTL output logic level signals. Current mirror transistors are interconnected between the input transistors and the output transistor for turning on and off the output transistor. High-pass networks are coupled to the current mirror transistors for increasing its transient response so as to facilitate turning on and off quickly the output transistor. The TTL output logic levels have a relatively small propagation delay responsive to transitions of the ECL input logic level signals.

摘要翻译： 具有用于将ECL逻辑电平转换为TTL逻辑电平的高开关速度的逻辑电平转换器包括用于接收ECL输入逻辑电平信号的一对输入晶体管和用于产生TTL输出逻辑电平信号的输出晶体管。 电流镜晶体管在输入晶体管和输出晶体管之间互连，用于导通和关断输出晶体管。 高通网络耦合到电流镜晶体管，用于增加其瞬态响应，以便于快速地导通和关断输出晶体管。 响应于ECL输入逻辑电平信号的转换，TTL输出逻辑电平具有相对较小的传播延迟。

公开(公告)号：EP0206492B1

公开(公告)日：1990-08-22

申请号：EP86303599.4

申请日：1986-05-12

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Williams, Bertrand Jeffery

IPC分类号： H03K19/0175 ,  H03K19/013

CPC分类号： H03K19/01806 ,  H03K19/013

公开(公告)号：EP0203700A2

公开(公告)日：1986-12-03

申请号：EP86302923.7

申请日：1986-04-18

申请人： ADVANCED MICRO DEVICES, INC.

发明人： Williams, Bertrand Jeffery ,  Wilson, Stanley

IPC分类号： H03K19/092 ,  H03K19/013

CPC分类号： H03K3/288 ,  H03K19/0136 ,  H03K19/01812

摘要： A logic level translator having high switching speeds for converting ECL logic levels into TTL logic levels includes a pair of input transistors for receiving ECL input logic level signals and an output transistor for generating TTL output logic level signals. Current mirror transistors are interconnected between the input transistors and the output transistor for turning on and off the output transistor. High-pass networks are coupled to the current mirror transistors for increasing its transient response so as to facilitate turning on and off quickly the output transistor. The TTL output logic levels have a relatively small propagation delay responsive to transitions of the ECL input logic level signals.

摘要翻译： 具有用于将ECL逻辑电平转换为TTL逻辑电平的高开关速度的逻辑电平转换器包括用于接收ECL输入逻辑电平信号的一对输入晶体管和用于产生TTL输出逻辑电平信号的输出晶体管。 电流镜晶体管在输入晶体管和输出晶体管之间互连，用于导通和关断输出晶体管。 高通网络耦合到电流镜晶体管，用于增加其瞬态响应，以便于快速地导通和关断输出晶体管。 响应于ECL输入逻辑电平信号的转换，TTL输出逻辑电平具有相对较小的传播延迟。