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公开(公告)号：EP0476215B1
公开(公告)日：1995-12-13
申请号：EP90870154.3
申请日：1990-09-18
IPC分类号： H03H17/06
CPC分类号： H03H17/0607 , H03H17/0621 , H03H17/0664 , H03H2218/06
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2.发明公开Digital synchronizing arrangement using a tuned tapped delay line 失效同义词iner。。ten ten ten ten。。。。。。。。。。。。。。。。。。。。。
公开(公告)号：EP0520127A1
公开(公告)日：1992-12-30
申请号：EP91870102.0
申请日：1991-06-28
发明人： Van der Plas, Gert , Reusens, Peter Paul Frans , Verbiest, Willem Jules Antoine , Mestdagh, Denis Julien Gilles , Sierens, Christiaan Hendrik Jozef
IPC分类号： H04L7/033
CPC分类号： H04L7/0338 , H04L7/044
摘要： The synchronizing arrangement synchronizes a digital data signal (Din) applied to its data input terminal (Din) with a local clock (CKin) applied to its clock input (CKin). It includes a tuned tapped delay line (TDL) where the local clock (CKin) is delayed, a sampling circuit (DR2,.,DR4) where the digital data signal is sampled using a number of delayed clock signals, a first processing circuit (P) where the middle of a 0 1 0 pattern included in the signal is determined, a second processing circuit P2 where the variation in time of that middle is determined and an output circuit where based on the mentioned middle and variation, one of the delayed clock signals is selected to read the digital data signal.
The tuned tapped delay line includes a tapped delay line and a feedback circuit at two inputs of which the input of the tuned tapped delay line and its 90 degrees tap are applied. The output of the feedback circuit is connected to a control input of the tapped delay line.摘要翻译： 同步装置使应用于其数据输入端（Din）的数字数据信号（Din）与应用于其时钟输入（CKin）的本地时钟（CKin）同步。 它包括本地时钟（CKin）被延迟的调谐抽头延迟线（TDL），使用多个延迟的时钟信号对数字数据信号进行采样的采样电路（DR2，...，DR4），第一处理电路 P），其中确定包括在信号中的0 1 0模式的中间，确定中间时间变化的第二处理电路P2和基于所述中间和变化的输出电路，延迟 选择时钟信号来读取数字数据信号。 调谐抽头延迟线包括抽头延迟线和在两个输入处的反馈电路，其中施加调谐抽头延迟线的输入及其90度抽头。 反馈电路的输出连接到抽头延迟线的控制输入。
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公开(公告)号：EP0476215A1
公开(公告)日：1992-03-25
申请号：EP90870154.3
申请日：1990-09-18
IPC分类号： H03H17/06
CPC分类号： H03H17/0607 , H03H17/0621 , H03H17/0664 , H03H2218/06
摘要： 5n7 A multi-sample multi-channel decimator producing a FIR filtering response from 128 digital filter coefficients for 4 independent channels with a decimation ratio of 32, i.e. from 1 MHz 1-bit inputs to 32 kHz multibit outputs, splits cyclically the coefficient values in 16 groups of 8, according to the coefficient positions, into 4 ROMs (0, 1, 2, 3). The ROMs are coupled to the 4 multipliers (MULT 0, 1, 2, 3), wherein the coefficient value is multiplied by that of the input bit, through a multiplexer (MUXI) able to cycle through 4 distinct conditions. After the 4 adder accumulators (ACC 0, 1, 2, 3) coupled to the outputs of their respective channel multipliers have, in parallel partially computed output words, each using one sixteenth of the coefficients, the multiplexer rotates these, thereby enabling complete computation in 4 cycles, 4 registers (REG 00, 01, 02, 03) being associated to each adder so as to compute 4 staggered output words simultaneously for each channel. A preferred filtering response can reduce the size of the ROMs.
摘要翻译： 一个多采样多通道抽取器产生一个来自128个数字滤波器系数的FIR滤波响应，用于4个独立通道，抽取比为32，即从1MHz 1位输入到32 kHz多位输出，循环分解16组中的系数值 的8个，根据系数位置，分为4个ROM（0，1，2，3）。 这些ROM耦合到4个乘法器（MULT 0,1,2,3），其中系数值乘以输入位的系数值，通过能够循环通过4个不同条件的多路复用器（MUXI）。 在耦合到其各自的信道乘法器的输出的4个加法器累加器（ACC 0，1，2，3）之后，在并行部分计算的输出字中，每个使用十六分之一系数，多路复用器旋转它们，从而使得能够完全计算 在4个周期中，4个寄存器（REG 00,01,02,03）与每个加法器相关联，以便为每个通道同时计算4个交错的输出字。 优选的过滤响应可以减小ROM的大小。
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4.发明公开Transfer method, frame information extraction circuit and clock pulse stream regenerator used therein 失效传输方法，电路，用于回收其中所使用的帧信息和时钟脉冲再生器。
公开(公告)号：EP0592725A1
公开(公告)日：1994-04-20
申请号：EP92202871.7
申请日：1992-09-18
CPC分类号： H04J3/0614 , H03K5/19 , H04L7/027
摘要： A method for transferring a clock pulse stream and frame information over a single interconnection cable, from a transmitter to a receiver (CKR, FRR) of a telecommunication system. The modulation comprises the omission at the frame information pulse rate of pulses from the clock pulse stream.
A frame information extraction circuit (CKR, FRR) which includes:
means (CLR) to regenerate the clock pulse stream (R155M) from the received modulated clock pulse stream (I155M);
means (FF1/2) to decrease the clock pulse rate and the modulated clock pulse rate by two, thereby respectively generating a modified clock pulse stream (R75M) and a modified modulated clock pulse stream (I75M, D75M); and
sampling means (FF3) to sample the modified modulated clock pulse stream at the modified clock pulse rate, thereby generating an output pulse stream (QFF3) whose pulse transitions are indicative of the frame information.
A clock pulse stream regenerator (CLR) which includes a pulse recovering circuit (M5-7, L, C, M10/11) having two branches (M10/M5; M11/M6) each including the series connection of a current source (M10; M11) and a switch (M5; M6). The branches are connected to a common second current source (M7) and the switches are differentially controlled by the modulated clock pulse stream (+/-I155M). The junction points of the current source and the switch of each branch are interconnected by an L-C tank filter (L, C) and constitute differential outputs at which a regenerated clock pulse stream (R155M) without missing pulses is obtained.摘要翻译： 一种用于传递环的时钟脉冲流和帧信息通过单个互连电缆，从发射机到接收机的电信系统的（CKR，FRR）方法，该调节包括省略在脉冲从时钟脉冲帧信息脉搏率 流。 帧信息提取电路（CKR，FRR），其包括：手段（CLR），以再生时钟脉冲流（R155M）从所接收的调制时钟脉冲流（I155M）; 装置（FF1 / 2）以降低时钟脉冲速率和由两个调制时钟脉冲速率，从而分别产生修改的时钟脉冲流（R75M）和改性调制时钟脉冲流（I75M，D75M）; 和采样装置（FF3）进行采样，在修改后的时钟脉冲率修改后的调制时钟脉冲流，由此生成在输出脉冲流（QFF3），其脉冲跃迁指示的帧的信息。 时钟脉冲流再生器（CLR），它包括一个脉冲回收电路（M5-7，L，C，M10 / 11），其具有两个分支（M10 / M5，M11 / M6）每一个都包括电流源的串联连接（M10 ; M11）和一个开关（M5; M6）。 该分支被连接到共同的第二电流源（M7）和开关被差分由调制时钟脉冲流（+/- I155M）控制。 在电流源和每个分支的开关的结点由L-C槽路滤波器（L，C），并且构成在哪一个再生的时钟脉冲流（R155M）而不会丢失脉冲获得差分输出相互连接。
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5.发明公开
公开(公告)号：EP0548415A1
公开(公告)日：1993-06-30
申请号：EP91203411.3
申请日：1991-12-24
IPC分类号： H04L25/49
CPC分类号： H04L25/4925
摘要： A data transmission system is proposed in which an auxiliary bitstream of low bitrate (AUX) is coded together with a main bitstream of high bitrate (PRIM) without increasing the transmission rate above the high bitrate. This auxiliary bitstream (AUX) is moreover transmitted synchronously with the main bitstream (PRIM).
To achieve this transmitter (T) divides the main bitstream (PRIM) in periodically occurring blocks of Y bits and codes one bit of the auxiliary bitstream (AUX) in each of said blocks by using a first (AMI) or a second (VAMI) coding law according to the binary value of that bit. The second law is constructed by violating the first coding law (AMI) according to a predetermined violation law. Redundancy in the first coding law (AMI) is used to introduce symbol sequences not permitted under this first coding law (AMI) and to so obtain the second coding law (VAMI).摘要翻译： 提出了一种数据传输系统，其中低比特率（AUX）的辅助比特流与高比特率（PRIM）的主比特流一起编码，而不增加高于高比特率的传输速率。 此外，该辅助比特流（AUX）与主比特流（PRIM）同步传输。 为了实现该发射机（T），将主比特流（PRIM）划分为周期性出现的Y比特块，并通过使用第一（AMI）或第二（VAMI）码来对每个所述块中的辅助比特流（AUX）的一个比特进行编码， 根据该位的二进制值编码法。 第二定律是根据预定违规法违反第一编码法（AMI）构建的。 第一编码规则（AMI）中的冗余用于引入在该第一编码规则（AMI）下不允许的符号序列，从而获得第二编码规则（VAMI）。
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6.发明公开Method, interface modules and telephone network for multiplexing and demultiplexing an analog MTS (message telephone service) signal and an ADSL (asymmetric digital subscriber line) datastream 失效方法，接口模块和用于复用电话网络和去复用的模拟MTS（电话服务）和ADSL（非对称数字用户线）的数据流
公开(公告)号：EP0740451A1
公开(公告)日：1996-10-30
申请号：EP95201040.3
申请日：1995-04-24
发明人： Mestdagh, Denis Julien Gilles , Spruyt, Paul , Reusens, Peter Paul Frans , op de Beeck, Edmond Celina Jozef
CPC分类号： H04L5/06 , H04M11/068
摘要： An analog MTS (Message Telephone Service) signal (TS) and an ADSL (Asymmetric Digital Subscriber Line) datastream (AD) are multiplexed to be transmitted simultaneously on a twisted pair transmission line (TL). In a first step, the analog MTS (Message Telephone Service) signal (TS) is transformed into a digital form (DS, TSC). The digital MTS (Message Telephone Service) signal (DS, TSC) in a second step is embedded in the ADSL (Asymmetric Digital Subscriber Line) datastream (AD).
At the receiver side, the digital MTS (Message Telephone Service) signal (DS, TSC) and ADSL (Asymmetric Digital Subscriber Line Service) datastream (AD) are split up again, and the digital MTS (Message Telephone Service) signal (DS, TSC) is retransformed into the analog MTS (Message Telephone Service) signal (TS).
To maintain telephone service even when the ADSL equipment fails, an alternative path enables transmission of the MTS (Message Telephone Service) signal in its analog form, independently from the ADSL equipment.摘要翻译： 模拟MTS（消息电话服务）的信号（TS）和ADSL（非对称数字用户线）（AD）被多路复用为反式mitted可以同时对双绞传输线（TL）的数据流。 在第一步骤中，模拟MTS（消息电话服务）的信号（TS）被变换成数字形式（DS，TSC）。 在第二步骤中，数字MTS（消息电话服务）的信号（DS，TSC）被嵌入在ADSL（非对称数字用户线）的数据流（AD）。 在接收机侧，数字MTS（消息电话服务）的信号（DS，TSC）的数据流和ADSL（非对称数字用户线路服务）（AD）被再次分裂，并且数字MTS（消息电话服务）的信号（DS， TSC）被再次变换为模拟MTS（消息电话服务）的信号（TS）。 甚至当ADSL设备不替代路径允许在其模拟形式的MTS（消息电话服务）的信号，从ADSL设备unabhängig的传输保持电话服务。
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公开(公告)号：EP0719002A1
公开(公告)日：1996-06-26
申请号：EP94203725.0
申请日：1994-12-22
CPC分类号： H04L27/2657 , H04L27/2675 , H04L27/3818
摘要： The present invention concerns a signal processor module (SPU,AVF) which is adapted to check if a received vector (RV) representing a received signal in a QAM signal vector plane is located in the intersection zone of a first and second zone (ABCDEF,ab) of this signal vector plane. The intersection zone is well chosen so that the phase angle difference (Da) between the received vector (RV) and an expected vector (EV) which represents a signal which should have been received instead of the received signal and which is located in the intersection zone, is limited.
摘要翻译： 本发明涉及一种信号处理器模块（SPU，AVF），其适于检查表示QAM信号矢量平面中的接收信号的接收矢量（RV）是否位于第一和第二区域的交叉区域（ABCDEF， ab）的信号矢量平面。 交叉区域被良好地选择，使得接收矢量（RV）和表示应当已经被接收的信号的期望矢量（EV）之间的相位角差（Da）代替接收到的信号，并且位于交点 区域有限。
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9.发明公开Method and windowing unit to reduce leakage, Fourier transformer and DMT modem wherein the unit is used 失效一种用于减少损耗窗口的方法和装置，傅里叶变换和DMT调制解调器，其中该装置用于
公开(公告)号：EP0802649A1
公开(公告)日：1997-10-22
申请号：EP96201060.9
申请日：1996-04-19
CPC分类号： H04L27/265
摘要： A windowing unit (WFU) improves band-limited noise immunity of a fourier transformer (FT) where it forms part of. The windowing unit (WFU) thereto comprises a digital window filter (WI) and a folding processor (F). The window function (W) of the digital window filter (WI) consists of a window head (HEAD), a window body (BODY), and a window tail (TAIL), and the shape of the window function (W) is chosen so that the window head (HEAD) is complementary to a tail (BODY TAIL) of a window body (BODY), and similarly the window tail (TAIL) is complementary to a head (BODY HEAD) of the window body (BODY). The folding processor (F) performs the task of mapping the information received in the window head (HEAD) on to the tail (BODY TAIL) of the window body (BODY) and mapping the information received in the window tail (TAIL) on to the head (BODY HEAD) of the window body (BODY).
摘要翻译： 加窗单元（WFU）改善傅立叶变换器（FT），在其中形成的部分的限带噪声的免疫力。 开窗单元（WFU）于此包括数字窗口滤波器（WI）和折叠处理器（F）。 所述窗函数的数字窗口滤波器（WI）的（W）besteht一个窗口头（HEAD），视窗体（车身）和窗口尾部（尾部），该窗口函数（W）的形状被选择 这样做了窗口主体（BODY）的窗头（HEAD）是一个尾部（机身尾）的互补性，并且类似地，窗口尾部（尾部）是窗口主体（BODY）的互补的头部（BODY HEAD）。 折叠处理器（F）执行映射窗口主体（BODY）对窗头（HEAD）接收到尾部（BODY TAIL）的信息和关于对映射在窗口尾（TAIL）接收的信息的任务 窗主体（BODY）的头部（BODY HEAD）。
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公开(公告)号：EP0677938A1
公开(公告)日：1995-10-18
申请号：EP94201015.8
申请日：1994-04-14
CPC分类号： H04M11/062 , H04L5/06 , H04Q2213/13034 , H04Q2213/1319 , H04Q2213/13199 , H04Q2213/13302 , H04Q2213/13305 , H04Q2213/1332
摘要： The present invention relates to a signal coupler for coupling Plain Old Telephone Service (POTS) signals and Asymmetric Digital Subscriber Line (ADSL) signals to a common line (TL). In order to avoid saturation of inductances (L1,L2,L3,L4) of a low pass POTS filter (LPF) located between the POTS transmitter/receiver (PTR) and this common line (TL) when the POTS signal is not sufficiently attenuated by this common line (TL), a variable impedance (SL) is inserted between the POTS transmitter/receiver (PTR) and this low pass POTS filter (LPF). The value of this variable impedance (SL) is controlled by a control signal (CS) supplied by the ADSL transmitter/receiver (ATR) which measures the attenuation caused by this common line (TL).
摘要翻译： 本发明涉及用于将普通老式电话业务（POTS）信号和非对称数字用户线路（ADSL）信号耦合到公共线路（TL）的信号耦合器。 为了避免当POTS信号没有充分衰减时位于POTS发射机/接收机（PTR）和该公共线路（TL）之间的低通POTS滤波器（LPF）的电感（L1，L2，L3，L4）饱和 通过该公共线（TL），可变阻抗（SL）被插入在POTS发射器/接收器（PTR）和该低通POTS滤波器（LPF）之间。 该可变阻抗（SL）的值由由测量由该公共线（TL）引起的衰减的ADSL发射机/接收机（ATR）提供的控制信号（CS）控制。
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