ÜBERTRAGUNG VON ANSTEUERSIGNALEN UND DATENSIGNALEN
    2.
    发明公开
    ÜBERTRAGUNG VON ANSTEUERSIGNALEN UND DATENSIGNALEN 审中-公开
    ÜBERTRAGUNGVON ANSTEUERSIGNALEN UND DATENSIGNALEN

    公开(公告)号:EP3192165A1

    公开(公告)日:2017-07-19

    申请号:EP15800753.4

    申请日:2015-11-19

    IPC分类号: H02P27/06

    摘要: The invention relates to a method for transmitting an actuation signal (3) and a first data signal (4) between a control device (9) and an actuation device (12) of a power semiconductor device (13). In order to minimize the expenditure for the operation of the physical transmission channels and the costs for the laying of the physical connection between control device (9) and actuation device (12), it is proposed that the transmission of the actuation signal (3) and the first data signal (4) between the control device (9) and the actuation device (12) takes place simultaneously and via a common transmission channel, the first data signal (4) being combined with the actuation signal (3) by means of a digital modulation method or coding method.

    摘要翻译: 本发明涉及一种用于在功率半导体器件(13)的控制装置(9)和致动装置(12)之间传输致动信号(3)和第一数据信号(4)的方法。 为了最小化物理传输通道的操作费用和用于在控制装置(9)和致动装置(12)之间建立物理连接的成本,建议致动信号(3) 并且控制装置(9)和致动装置(12)之间的第一数据信号(4)同时且经由公共传输通道发生,第一数据信号(4)通过装置与致动信号(3)组合 数字调制方法或编码方法。

    METHOD OF SYNCHRONISING DATA
    8.
    发明公开
    METHOD OF SYNCHRONISING DATA 有权
    同步数据的方法

    公开(公告)号:EP2140589A2

    公开(公告)日:2010-01-06

    申请号:EP01965434.2

    申请日:2001-09-12

    申请人: Ericsson AB

    IPC分类号: H04J3/00

    摘要: A method of synchronising data in a communications system (10) comprises the steps of: (a) Generating at transmitting means (20) a composite signal comprising a serial stream of data partitioned in one or more frames; (b) transmitting the composite signal through communicating means (50) to receiving means (30); (c) generating multiphase clock signals; (d) comparing the composite signal received at the receiving means with each of the multiphase clock signals until either sustained coincidence therebetween is achieved or sustained non-coincidence is achieved, thereby synchronising the receiving means to bit boundaries in the composite signal and to one or more of the clock phase signals; (e) correlating one or more bit templates at the receiving means with one or more corresponding bit templates in the composite signal received at the receiving means to determine where frames start in the composite signal, thereby synchronising the receiving means to the one or more frames in the composite signal.

    摘要翻译: 一种使通信系统(10)中的数据同步的方法包括以下步骤:(a)在发送装置(20)处生成包括以一个或多个帧划分的串行数据流的复合信号; (b)通过通信装置(50)将复合信号传送到接收装置(30); (c)产生多相时钟信号; (d)将在接收装置接收到的复合信号与每个多相时钟信号进行比较,直到达到它们之间的持续一致或者达到持续不一致为止,从而使接收装置与复合信号中的比特边界同步, 更多的时钟相位信号; (e)将接收装置处的一个或多个比特模板与在接收装置处接收的复合信号中的一个或多个对应比特模板相关联,以确定帧在复合信号中的起始位置,从而使接收装置与一个或多个帧同步 在复合信号中。

    SYNCHRONOUS ONE-BIT INTERFACE PROTOCOL OR DATA STRUCTURE
    9.
    发明公开
    SYNCHRONOUS ONE-BIT INTERFACE PROTOCOL OR DATA STRUCTURE 审中-公开
    SYNCHRON一个位接口协议或数据结构

    公开(公告)号:EP1910921A2

    公开(公告)日:2008-04-16

    申请号:EP06773479.8

    申请日:2006-06-19

    IPC分类号: G06F9/45

    摘要: Systems and methods provide for data transfer and transmission according to a synchronous one-bit interface protocol. A bit stream is generated including first data to be transferred or transmitted and second data from which a clock period used to encode the first data may be extracted. The bit stream is provided to a processor for decoding. In one embodiment, the bit stream includes a start segment or sequence, a data segment and a stop segment or sequence. A clock period is encoded into and is extracted from the start and/or stop sequences. The data segment is decoded on the basis of the clock period.

    TIME SYNCHRONIZATION IN SERIAL COMMUNICATIONS
    10.
    发明公开
    TIME SYNCHRONIZATION IN SERIAL COMMUNICATIONS 审中-公开
    串行通讯的时间同步

    公开(公告)号:EP1900128A1

    公开(公告)日:2008-03-19

    申请号:EP06764534.1

    申请日:2006-06-29

    申请人: ABB Oy

    发明人: BJÖRKMAN, Heikki

    IPC分类号: H04J3/06 G06F13/38

    摘要: A real-time clock (151) for electronic equipment is synchronized by supplying a time signal (4-1) to a serial communications circuit (11) with the data transmission rate adapted so that one character of the time signal can be read into the serial communications circuit as one character. The serial communications circuit (11) initiates (4-2) an interrupt handler (131) that in turn initiates (4-7) a sync task (132) . The time signal (4-1) is inverted if necessary before being supplied to the serial communications circuit (11) . In this way the time signal is superimposed over the serial data.