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公开(公告)号:EP1792402A1
公开(公告)日:2007-06-06
申请号:EP05774067.2
申请日:2005-08-23
Applicant: ANALOG DEVICES, INCORPORATED
Inventor: KIRBY, Patrick C. , LYDEN, Colin G. , VINEREANU, Tudor M.
IPC: H03M1/10
CPC classification number: H03M1/1057 , H03M1/785
Abstract: A DAC architecture is described. The architecture is specifically adapted to provided an analog voltage output based on a digital input word. The architecture includes a resistor ladder configuration sub-divisible into a first component, adapted to convert a lower part of the input word, and a second component adapted to convert an upper part of the input word. The DAC is calibrated such that the first component can be used to tune the output of the second component on selection of specific segment from the second component.
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公开(公告)号:EP1792402B1
公开(公告)日:2009-07-15
申请号:EP05774067.2
申请日:2005-08-23
Applicant: ANALOG DEVICES, INCORPORATED
Inventor: KIRBY, Patrick C. , LYDEN, Colin G. , VINEREANU, Tudor M.
IPC: H03M1/10
CPC classification number: H03M1/1057 , H03M1/785
Abstract: A DAC architecture is described. The architecture is specifically adapted to provided an analog voltage output based on a digital input word. The architecture includes a resistor ladder configuration sub-divisible into a first component, adapted to convert a lower part of the input word, and a second component adapted to convert an upper part of the input word. The DAC is calibrated such that the first component can be used to tune the output of the second component on selection of specific segment from the second component.
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