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    DIGITAL-TO-ANALOG CONVERTER STRUCTURES
    2.
    发明公开
    DIGITAL-TO-ANALOG CONVERTER STRUCTURES 有权
    结构进行数模转换

    公开(公告)号：EP1792402A1

    公开(公告)日：2007-06-06

    申请号：EP05774067.2

    申请日：2005-08-23

    申请人： ANALOG DEVICES, INCORPORATED

    发明人： KIRBY, Patrick C. ,  LYDEN, Colin G. ,  VINEREANU, Tudor M.

    IPC分类号： H03M1/10

    CPC分类号： H03M1/1057 ,  H03M1/785

    摘要： A DAC architecture is described. The architecture is specifically adapted to provided an analog voltage output based on a digital input word. The architecture includes a resistor ladder configuration sub-divisible into a first component, adapted to convert a lower part of the input word, and a second component adapted to convert an upper part of the input word. The DAC is calibrated such that the first component can be used to tune the output of the second component on selection of specific segment from the second component.

    METHOD FOR CLEANING SILICON WAFERS SURFACES BEFORE BONDING
    5.
    发明公开
    METHOD FOR CLEANING SILICON WAFERS SURFACES BEFORE BONDING 审中-公开
    程序进行清洗和硅衬底随后的接合

    公开(公告)号：EP1440463A2

    公开(公告)日：2004-07-28

    申请号：EP02777645.9

    申请日：2002-10-25

    申请人： ANALOG DEVICES, INCORPORATED

    发明人： NEVIN, William, Andrew ,  McCANN, Paul, Damien ,  O'NELL, Garry, Patrick

    IPC分类号： H01L21/306 ,  H01L21/20

    CPC分类号： H01L21/02052 ,  H01L21/187

    摘要： A method for bonding a pair of silicon wafers (2,3) together to form a semiconductor Wafer (1) wherein )an interface surface (5) of one of the silicon wafers (3) is pretreated by an ion implantation or diffusion process prior to bonding of the silicon wafers (2,3). The )method includes Subjecting the pretreated interface surface (5) to an initial anneal step at approximately )700°C for 60 minutes for recrystallising the interface surface, and then Subjecting both interface surfaces (4,5) to two cleaning steps with respective first and second cleaning solutions, neither of which Contain sulphuric acid. The first cleaning solution comprises hydrogen peroxide, ammonia and water, while the second cleaning solution comprises hydrofluoric acid and water. The respective interface surfaces (4,5) are rinsed with water after each cleaning step, and the silicon wafers (2,3) are bonded by anneal bonding at a temperature of the order of 1, 150°C for approximately 60 minutes.

    METHOD AND APPARATUS FOR USE IN SWITCHED CAPACITOR SYSTEMS
    7.
    发明公开
    METHOD AND APPARATUS FOR USE IN SWITCHED CAPACITOR SYSTEMS 有权
    随着产连的方法和装置中使用的系统

    公开(公告)号：EP1354408A2

    公开(公告)日：2003-10-22

    申请号：EP01941532.2

    申请日：2001-05-21

    申请人： ANALOG DEVICES, INCORPORATED

    发明人： FERGUSON, Paul, F., Jr. ,  HAURIE, Xavier, S. ,  TEMES, Gabor, C.

    IPC分类号： H03M1/80

    CPC分类号： H03M1/682 ,  H03M1/46 ,  H03M1/806

    摘要： Systems and methods receive a digital signal and generate an analog signal indicative thereof. In one embodiment, a system includes a DAC that receives a multi-bit digital signal, generates at least two analog signals each indicative of the multi-bit digital signal, and filters two or more of the at least two analog signals. In another embodiment, a system includes a DAC that receives digital input signals at an input data rate and outputs analog signals indicative of the digital signals to a signal conditioning stage at an output data rate different than the input data rate.

    APPARATUS AND METHOD FOR DRIVING CIRCUIT PINS IN A CIRCUIT testing system
    8.
    发明公开
    APPARATUS AND METHOD FOR DRIVING CIRCUIT PINS IN A CIRCUIT testing system 审中-公开
    设备和多年驾车经过围巾TKREISANSCHLÜSSEN围巾TKREISPRÜFEINRICHTUNG

    公开(公告)号：EP1352256A2

    公开(公告)日：2003-10-15

    申请号：EP02720781.0

    申请日：2002-01-10

    申请人： ANALOG DEVICES, INCORPORATED

    发明人： BABCOCK, Douglas, W.

    IPC分类号： G01R31/28

    CPC分类号： G01R31/31924 ,  G01R31/31926

    摘要： A circuit testing apparatus includes a controlling processor for controlling stimulus signals to be applied to a circuit under test and for processing and storing response signals generated by the circuit under test in response to the stimulus signals. The stimulus signals are generated by a driver portion of a receiver/driver circuit coupled to a pin on the circuit under test. The driver (134) includes an output stage circuit coupled to the pin on the circuit under test. The output stage circuit includes a linear amplifier circuit which receives a control signal (VIL, VIH) via the controlling processor and generates from the control signal a drive signal to be applied to the circuit under test. The linear amplifier allows the driver to produce a drive signal with a high level of voltage and timing accuracy and, in the case of digital square pulse signals, a high level of pulse symmetry.

    DIGITAL SIGNAL PROCESSOR HAVING DATA ALIGNMENT BUFFER FOR PERFORMING UNALIGNED DATA ACCESSES
    9.
    发明授权
    DIGITAL SIGNAL PROCESSOR HAVING DATA ALIGNMENT BUFFER FOR PERFORMING UNALIGNED DATA ACCESSES 有权
    随着数据对齐缓冲器数字信号处理器不结盟DATA ENTRY

    公开(公告)号：EP1047989B1

    公开(公告)日：2003-04-02

    申请号：EP99901404.6

    申请日：1999-01-08

    申请人： ANALOG DEVICES, INCORPORATED

    发明人： GARDE, Douglas

    IPC分类号： G06F9/312 ,  G06F12/04

    CPC分类号： G06F9/30043 ,  G06F9/3816 ,  G06F12/04

    摘要： A high performance digital signal processor includes a memory for storing instructions and operands for digital signal computations and a core processor connected to the memory. The memory may include first, second and third memory banks connected to the core processor by first, second and third data and address buses, respectively. The core processor includes a program sequencer and may include first and second computation blocks for performing first and second subsets, respectively, of the digital signal computations. A data alignment buffer is provided between the memory banks and the computation blocks. The data alignment buffer permits unaligned accesses to specified operands that are stored in different memory rows. The specified operands are supplied to one or both of the computation blocks in the same processor cycle.