摘要:
A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output (14) of a differential amplifier (12) connected for establishing a voltage level between voltage limits V cc and V ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor (Q8) has a collector connected to the output driver output (20), an emitter connected to the V ee voltage source, and a base coupled through a boost capacitor (C1) to the second amplifier output (16). A voltage clamp embracing a clamp transistor (Q7) with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor (C1) and the pull-down transistor (Q8) base and a collector connected to the V cc voltage source. The clamp transistor (Q7) is operated in Darlington configuration to provide a minimum discharge impedance to the base of the pull-down transistor (Q8). A recovery capacitor (C1) is connected between the clamp transistor (Q7) base and the first amplifier output (16) to speed up the clamp transistor's operation.
摘要:
A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output (14) of a differential amplifier (12) connected for establishing a voltage level between voltage limits V cc and V ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor (Q8) has a collector connected to the output driver output (20), an emitter connected to the V ee voltage source, and a base coupled through a boost capacitor (C1) to the second amplifier output (16). A voltage clamp embracing a clamp transistor (Q7) with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor (C1) and the pull-down transistor (Q8) base and a collector connected to the V cc voltage source. The clamp transistor (Q7) is operated in Darlington configuration to provide a minimum discharge impedance to the base of the pull-down transistor (Q8). A recovery capacitor (C1) is connected between the clamp transistor (Q7) base and the first amplifier output (16) to speed up the clamp transistor's operation.