Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit
    1.
    发明公开
    Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit 失效
    使用钳位电容引导电路联合ECL输出信号的方法和装置

    公开(公告)号:EP0317271A3

    公开(公告)日:1990-05-16

    申请号:EP88310782.3

    申请日:1988-11-15

    CPC分类号: H03K19/01812 H03K19/0136

    摘要: A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output (14) of a differential amplifier (12) connected for establishing a voltage level between voltage limits V cc and V ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor (Q8) has a collector connected to the output driver output (20), an emitter connected to the V ee voltage source, and a base coupled through a boost capacitor (C1) to the second amplifier output (16). A voltage clamp embracing a clamp transistor (Q7) with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor (C1) and the pull-down transistor (Q8) base and a collector connected to the V cc voltage source. The clamp transistor (Q7) is operated in Darlington configuration to provide a minimum discharge impedance to the base of the pull-down transistor (Q8). A recovery capacitor (C1) is connected between the clamp transistor (Q7) base and the first amplifier output (16) to speed up the clamp transistor's operation.

    Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit
    2.
    发明公开
    Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit 失效
    的方法和设备,用于耦合具有锁定容性自举电路的ECL输出信号。

    公开(公告)号:EP0317271A2

    公开(公告)日:1989-05-24

    申请号:EP88310782.3

    申请日:1988-11-15

    CPC分类号: H03K19/01812 H03K19/0136

    摘要: A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output (14) of a differential amplifier (12) connected for establishing a voltage level between voltage limits V cc and V ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor (Q8) has a collector connected to the output driver output (20), an emitter connected to the V ee voltage source, and a base coupled through a boost capacitor (C1) to the second amplifier output (16). A voltage clamp embracing a clamp transistor (Q7) with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor (C1) and the pull-down transistor (Q8) base and a collector connected to the V cc voltage source. The clamp transistor (Q7) is operated in Darlington configuration to provide a minimum discharge impedance to the base of the pull-down transistor (Q8). A recovery capacitor (C1) is connected between the clamp transistor (Q7) base and the first amplifier output (16) to speed up the clamp transistor's operation.

    摘要翻译: 一种用于提供ECL输出信号输出到一个电容负载的方法和装置,包括具有连接在一个输出端建立电压限制Vcc和V形之间的电压电平的差分放大器(12)的第一输出(14)的输入信号的差分放大 响应于在所述第一放大器输出的变化的输出驱动器。 一个下拉晶体管(Q8)具有连接到在连接到V形电压源发射所述输出驱动器的输出(20)的集电极,并通过升压电容器(C1)到所述第二放大器输出端(16)联接的位置。 电压钳拥抱一个钳位晶体管(Q7)具有连接的基地以接收预定的控制电压具有发射极连接至升压电容器(C1)和所述下拉晶体管(Q8)基极和集电极连接到Vcc电压源 , 钳位晶体管(Q7)的达林顿结构​​被操作以提供最小放电阻抗的下拉晶体管(Q8)的基极。 甲恢复电容器(C1)连接在钳位晶体管(Q7)基极和第一放大器输出端(16),以加快钳位晶体管的操作之间。