公开(公告)号：EP2368246A4

公开(公告)日：2012-07-04

申请号：EP09827078

申请日：2009-11-17

申请人： ATI TECHNOLOGIES ULC

发明人： FRY JAMES ,  GUTHRIE GEORGE

IPC分类号： G11C7/10 ,  G11C8/18 ,  G11C11/4063 ,  G11C11/4096

CPC分类号： G11C7/1051 ,  G06F13/1668 ,  G11C7/1006 ,  G11C7/1009 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/1096 ,  G11C11/4096

摘要： A memory interface circuit includes a plurality of data bus drivers and logic adapted to be operatively responsive to write driver mask information. If desired, the plurality of bus drivers and the logic may be implemented in separate integrated circuits. The plurality of bus drivers are adapted to be responsive to a write operation. The logic is also adapted to disable any one of the plurality of data bus drivers based on the write driver mask information during the write operation.

摘要翻译： 存储器接口电路包括数据总线驱动器和逻辑angepasst的多元性可操作性地响应于写驱动器掩码信息。 如果需要清除，总线驱动器的多元性和逻辑可以在单独的集成电路来实施。 公交车司机的多元化是angepasst为响应写操作。 的逻辑是这样angepasst禁用基于所述写操作期间，写驱动器掩模信息数据总线驱动器的所述多个的任何一个。