公开(公告)号：EP1411339A3

公开(公告)日：2004-05-12

申请号：EP04001628.9

申请日：1999-02-17

申请人： Anritus Corporation ,  Nippon Telegraph and Telephone Corporation

发明人： Otani, Akihito ,  Otsubo, Toshinobu ,  Takara, Hidehiko ,  Kawanishi, Satoki ,  Yamabayashi, Yoshiaki

IPC分类号： G01J9/02 ,  G01M11/00

CPC分类号： G01M11/336 ,  G01J4/00 ,  G01J7/00 ,  G01J2009/0261 ,  G01M11/332 ,  G01M11/335

摘要： A first tunable wavelength pulse light source (22) is driven by a reference signal to emit a first optical pulse. An optical demultiplexer (24) demultiplexes a first optical pulse emitted from the first pulse light source (22) into a reference optical pulse and an incident optical pulse to be sent into an object to be measured. An optical multiplexer (26) multiplexes the reference optical pulse and an outgoing optical pulse passing through the object to output multiplexed light. A second pulse light source (23) generates a second optical pulse which is synchronous with the first optical pulse and delays a predetermined time for each period of the first optical pulse. A sampling unit (27, 27a, 27b) receives the multiplexed light and the second optical pulse to obtain an optical pulse train signal proportional to the intensity of the multiplexed light obtained in synchronism with the second optical pulse. From the optical pulse train signal from the sampling unit (27, 27a, 27b), a signal processor (37) obtains an envelope formed by peaks of individual optical pulses forming the optical pulse train. The wavelength dispersion of the object is obtained by measuring the delay time of the outgoing optical pulse passing through the object on the basis of intervals between the peaks of the envelope.

公开(公告)号：EP1411339A2

公开(公告)日：2004-04-21

申请号：EP04001628.9

申请日：1999-02-17

申请人： Anritus Corporation ,  Nippon Telegraph and Telephone Corporation

发明人： Otani, Akihito ,  Otsubo, Toshinobu ,  Takara, Hidehiko ,  Kawanishi, Satoki ,  Yamabayashi, Yoshiaki

IPC分类号： G01M11/00 ,  G01J9/02

CPC分类号： G01M11/336 ,  G01J4/00 ,  G01J7/00 ,  G01J2009/0261 ,  G01M11/332 ,  G01M11/335

摘要： A first tunable wavelength pulse light source (22) is driven by a reference signal to emit a first optical pulse. An optical demultiplexer (24) demultiplexes a first optical pulse emitted from the first pulse light source (22) into a reference optical pulse and an incident optical pulse to be sent into an object to be measured. An optical multiplexer (26) multiplexes the reference optical pulse and an outgoing optical pulse passing through the object to output multiplexed light. A second pulse light source (23) generates a second optical pulse which is synchronous with the first optical pulse and delays a predetermined time for each period of the first optical pulse. A sampling unit (27, 27a, 27b) receives the multiplexed light and the second optical pulse to obtain an optical pulse train signal proportional to the intensity of the multiplexed light obtained in synchronism with the second optical pulse. From the optical pulse train signal from the sampling unit (27, 27a, 27b), a signal processor (37) obtains an envelope formed by peaks of individual optical pulses forming the optical pulse train. The wavelength dispersion of the object is obtained by measuring the delay time of the outgoing optical pulse passing through the object on the basis of intervals between the peaks of the envelope.

摘要翻译： 第一可调波长脉冲光源（22）由参考信号驱动以发射第一光脉冲。 光解复用器（24）将从第一脉冲光源（22）发射的第一光脉冲解复用为参考光脉冲和入射光脉冲以发送到待测量对象中。 光学多路复用器（26）多路复用参考光脉冲和穿过物体的输出光脉冲以输出多路复用光。 第二脉冲光源（23）产生与第一光脉冲同步的第二光脉冲，并延迟第一光脉冲的每个周期的预定时间。 采样单元（27,27a，27b）接收多路复用光和第二光脉冲，以获得与第二光脉冲同步获得的多路复用光的强度成比例的光脉冲串信号。 信号处理器（37）根据来自采样单元（27,27a，27b）的光脉冲串信号获得由形成光脉冲串的各个光脉冲的峰值形成的包络线。 物体的波长色散是通过根据包络峰值之间的间隔测量通过物体的输出光脉冲的延迟时间而获得的。

公开(公告)号：EP0684712B1

公开(公告)日：2005-05-04

申请号：EP95401132.6

申请日：1995-05-16

申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION

发明人： Tomizawa, Masahito ,  Yamabayashi, Yoshiaki ,  Kobayashi, Yukio ,  Nakagawa, Kiyoshi ,  Yagisawa, Ken-ichi

IPC分类号： H04J3/14 ,  H03M13/00

CPC分类号： H04J3/14 ,  H03M13/00 ,  H03M13/151 ,  H04J2203/0089

公开(公告)号：EP0696111A2

公开(公告)日：1996-02-07

申请号：EP95201966.9

申请日：1995-07-17

申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION

发明人： Kawase, Nobuyuki ,  Yamabayashi, Yoshiaki ,  Uematsu, Yoshihiko

IPC分类号： H04B1/74 ,  H04L1/22 ,  H04Q11/04

CPC分类号： H04B1/74 ,  H04J3/062 ,  H04J3/14 ,  H04J2203/0051 ,  H04J2203/006 ,  H04J2203/0076 ,  H04L1/22 ,  H04L2012/5619 ,  H04L2012/5627 ,  H04L2012/5647 ,  H04Q11/0478

摘要： A hitless path switching method without a bit loss. A bit error in the same digital line signals is continuously monitored independently of a predetermined data blocks of a working path (51) and a protection path (61). If a bit error occurs in the working path and no bit error occurs in the protection path, a switching trigger is produced and the switching from the working path to the protection path is performed on the data block basis. Only correct data are transferred to downstream apparatuses. A reliable hitless switching is achieved not only in response to a failure in its own path, but also in response to a bit error. Using data blocks of one frame length with an indicator for bit error check placed at its top makes an effective switching possible.

摘要翻译： 无丢包的无损路径切换方法。 独立于工作路径（51）和保护路径（61）的预定数据块连续地监视相同数字线路信号中的位错误。 如果在工作路径中发生位错误并且在保护路径中没有发生位错误，则产生切换触发，并且以数据块为基础执行从工作路径到保护路径的切换。 只有正确的数据传输到下游设备。 可靠的无中断切换不仅可以响应自身路径的故障，还可以响应误码。 使用一个帧长的数据块和位于其顶部的用于位错误检查的指示符可以进行有效切换。

公开(公告)号：EP0696111B1

公开(公告)日：2004-04-28

申请号：EP95201966.9

申请日：1995-07-17

申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION

发明人： Kawase, Nobuyuki ,  Yamabayashi, Yoshiaki ,  Uematsu, Yoshihiko

IPC分类号： H04B1/74 ,  H04L1/22 ,  H04Q11/04 ,  H04L29/14

CPC分类号： H04B1/74 ,  H04J3/062 ,  H04J3/14 ,  H04J2203/0051 ,  H04J2203/006 ,  H04J2203/0076 ,  H04L1/22 ,  H04L2012/5619 ,  H04L2012/5627 ,  H04L2012/5647 ,  H04Q11/0478

公开(公告)号：EP0696111A3

公开(公告)日：1997-03-19

申请号：EP95201966.9

申请日：1995-07-17

申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION

发明人： Kawase, Nobuyuki ,  Yamabayashi, Yoshiaki ,  Uematsu, Yoshihiko

IPC分类号： H04B1/74 ,  H04L1/22 ,  H04Q11/04

CPC分类号： H04B1/74 ,  H04J3/062 ,  H04J3/14 ,  H04J2203/0051 ,  H04J2203/006 ,  H04J2203/0076 ,  H04L1/22 ,  H04L2012/5619 ,  H04L2012/5627 ,  H04L2012/5647 ,  H04Q11/0478

摘要： A hitless path switching method without a bit loss. A bit error in the same digital line signals is continuously monitored independently of a predetermined data blocks of a working path (51) and a protection path (61). If a bit error occurs in the working path and no bit error occurs in the protection path, a switching trigger is produced and the switching from the working path to the protection path is performed on the data block basis. Only correct data are transferred to downstream apparatuses. A reliable hitless switching is achieved not only in response to a failure in its own path, but also in response to a bit error. Using data blocks of one frame length with an indicator for bit error check placed at its top makes an effective switching possible.

公开(公告)号：EP0684712A2

公开(公告)日：1995-11-29

申请号：EP95401132.6

申请日：1995-05-16

申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION

发明人： Tomizawa, Masahito ,  Yamabayashi, Yoshiaki ,  Kobayashi, Yukio ,  Nakagawa, Kiyoshi ,  Yagisawa, Ken-ichi

IPC分类号： H04J3/14 ,  H03M13/00

CPC分类号： H04J3/14 ,  H03M13/00 ,  H03M13/151 ,  H04J2203/0089

摘要： In an optical transmission system applicable to a SDH network, communication between two line terminating equipments is performed in a form of a STM frame composed of a SOH field and a payload, which is determined by CCITT recommendations. The line terminating equipment provides a FEC circuit which is preferably arranged at a location between MSP and MST function blocks. The FEC circuit is designed to perform coding/decoding operations, using a cyclic Hamming code, directly on each AU-4 message derived from the STM frame. Otherwise, the FEC circuit performs operations on each k-bit interleaved AU-4 message (where 'k' is an integer larger than 1). Check bits generated by a FEC coding circuit are written into undefined byte areas in a MSOH field, and error correcting is performed at a decoder circuit on the basis of embedded check bits, therefore FEC operations are performed within a multiplex-section layer. A FEC processing circuit is constituted by shift registers each of which is connected by exclusive-or logic so as to execute FEC processing calculation generating a remainder by a generator polynomial. For a FEC code on direct AU-4 message, the FEC processing circuit in parallel configuration for lowering an operational clock rate is determined by a matrix form calculation, which creates an output vector indicating a set of shift registers' data in a future clock timing from an input vector consisting of data stream in message and initial shift registers' values.

摘要翻译： 在适用于SDH网络的光传输系统中，以由CCITT建议确定的SOH字段和有效载荷构成的STM帧的形式执行两线路终端设备之间的通信。 线路终端设备提供FEC电路，其优选地布置在MSP和MST功能块之间的位置处。 FEC电路被设计为使用循环汉明码直接在从STM帧导出的每个AU-4消息上执行编码/解码操作。 否则，FEC电路对每个k位交织的AU-4消息（其中'k'是大于1的整数）执行操作。 由FEC编码电路生成的校验位被写入到MSOH字段中的未定义字节区域中，并且在解码器电路上基于嵌入校验位执行纠错，因此在多路复用部分层内执行FEC操作。 FEC处理电路由移位寄存器构成，每个移位寄存器通过异或逻辑连接，以执行通过生成多项式生成余数的FEC处理计算。 对于用于直接AU-4消息的FEC码，用于降低操作时钟速率的并行配置的FEC处理电路由矩阵形式计算确定，其形成指示未来时钟定时中的一组移位寄存器数据的输出向量 从由消息中的数据流和初始移位寄存器值组成的输入向量。