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1.发明公开
公开(公告)号：EP0968510A4
公开(公告)日：2005-01-05
申请号：EP97933337
申请日：1997-07-17
IPC分类号： H01J29/87 , G09G3/20 , G09G3/22 , H01J29/02 , H01J29/92 , H01J29/96 , H01J31/12 , H01J1/62 , H01J63/04
CPC分类号： H01J31/123 , H01J29/028 , H01J2329/8625 , H01J2329/864 , H01J2329/8645 , H01J2329/8655
摘要： Methods and structures are provided which reduce charge build up on spacer walls in a flat panel display. In one embodiment, the order of activating the electron emitting elements is modified such that the electron emitting elements adjacent to the spacers are activated before the electron emitting elements which charge thespacers (501, 502, 503) to an undesirable level. In another embodiment, face electrodes (501a, 502a, 503a) which are located on the surface of the spacer are connected to a common bus (504), thereby distributing the charge built up on any particular spacer. The common bus (504) can further be connected to a capacitor (1010) which is located either inside or outside the active region of the flat panel display, thereby increasing the charging time constant of the spacers. The capacitor can be connected to ground or to a high voltage supply (1011). In another embodiment, the charging time constant of the spacers is increased by fabricating the spacers from a material having a high dielectric constant, such as dispersion of aluminum oxide, chromium oxide and titanium oxide, wherein the titanium oxide makes up approximately four percent of the spacer material.
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