公开(公告)号：EP1483793A2

公开(公告)日：2004-12-08

申请号：EP03727583.1

申请日：2003-03-12

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ,  S.O.I. Tec Silicon on Insulator Technologies

发明人： TEMPLIER, François ,  BILLON, Thierry ,  DAVAL, Nicolas

IPC分类号： H01L29/872

CPC分类号： H01L29/6606 ,  H01L21/0475 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/78684 ,  H01L29/8126 ,  H01L29/872 ,  Y10S438/931

摘要： The invention relates to a power junction device comprising: a SiCOI-type substrate with a silicon carbide layer (16) which is insulated from a solid support (12) by means of an insulating buried layer (14), and at least one Schottky contact between a first metallic layer (40) and the silicon carbide surface layer (16), said first metallic layer (30) forming an anode.

公开(公告)号：EP1483793B1

公开(公告)日：2011-08-31

申请号：EP03727583.1

申请日：2003-03-12

申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives ,  S.O.I. Tec Silicon on Insulator Technologies

发明人： TEMPLIER, François ,  BILLON, Thierry ,  DAVAL, Nicolas

IPC分类号： H01L29/872

CPC分类号： H01L29/6606 ,  H01L21/0475 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/78684 ,  H01L29/8126 ,  H01L29/872 ,  Y10S438/931

摘要： The invention relates to a power junction device comprising: a SiCOI-type substrate with a silicon carbide layer (16) which is insulated from a solid support (12) by means of an insulating buried layer (14), and at least one Schottky contact between a first metallic layer (40) and the silicon carbide surface layer (16), said first metallic layer (30) forming an anode.

公开(公告)号：EP1535346A2

公开(公告)日：2005-06-01

申请号：EP03780259.2

申请日：2003-09-01

申请人： Commissariat A L'Energie Atomique ,  S.O.I.Tec Silicon on Insulator Technologies

发明人： TEMPLIER, François ,  DI CIOCCIO, Léa ,  BILLON, Thierry ,  LETERTRE, Fabrice

IPC分类号： H01L29/872

CPC分类号： H01L29/872 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/868

摘要： The invention relates to a power semiconductor device made of an epitaxied semiconductor material on a stacked structure (10), comprising a semiconductor material layer (13) which is applied to a first surface of a support substrate (11) and is integral with the support substrate (11) by means of an insulating layer (12), said support substrate comprising electric conduction means between the first surface and the second surface, the applied semiconductor material layer (13) acting as an epitaxy support layer for the epitaxied semiconductor material (14, 15).Means for electric connection (16, 17) of said device are provided on the epitaxied semiconductor material and on the second surface of the support substrate, whereby an electric connection via the electrically insulating layer and electric conduction means electrically links the epitaxied semiconductor material (14, 15) to electric connection means (17) provided on the second surface of the support substrate (11).

公开(公告)号：EP1547145A2

公开(公告)日：2005-06-29

申请号：EP03780258.4

申请日：2003-09-01

申请人： Commissariat A L'Energie Atomique ,  S.O.I.Tec Silicon on Insulator Technologies

发明人： DI CIOCCIO, Léa ,  TEMPLIER, François ,  BILLON, Thierry ,  LETERTRE, Fabrice

IPC分类号： H01L21/76

CPC分类号： H01L21/7602 ,  C30B25/02 ,  C30B29/36 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/2007

摘要： The invention relates to a method for the production of a composite SiCOI-type substrate comprising the following stages: provision of an initial substrate comprising an Si or SiC support (1) supporting an SiO2 layer (2) on which a thin SiC layer (3) is applied; expitaxy of the SiC (4) on the thin SiC layer (3). Epitaxy is carried out at the following temperatures: from 1450 °C in order to obtain 6H or 4H polytype epitaxy (4) on the thin, applied 6H or 4H polytype layer (3) respectively; if the support (1) is made of SiC, from 1350C in order to obtain 3C polytype epitaxy (4) on the thin, applied 3C polytype layer (3); if the support (1) is made of Si or SiC, from 1350 °C in order to obtain 6H or 4H polytype epitaxy (4) on a thin, applied 6H or 4H polytype layer (3) respectively if the support (1) is made of Si.