Improving flow rate accuracy of a fluidic delivery system
    5.
    发明公开
    Improving flow rate accuracy of a fluidic delivery system 有权
    Verbesserung derDurchflussgeschwindigkeitspräzisioneinesFlüssigkeitsabgabesystems

    公开(公告)号:EP2179757A1

    公开(公告)日:2010-04-28

    申请号:EP09252449.5

    申请日:2009-10-20

    摘要: Improving the accuracy of the flow rate of a valve (10) in a fluidic delivery device in which a desired flow rate may be achieved by varying the duty cycle of the valve. The flow rate of fluid delivery from the valve over its lifetime is stabilized by minimizing the voltage OPENING time of the valve to account for valve and piezoelectric actuator (53) drift. Also, the valve OPENING time of one or more fluidic parameters that impact on the flow rate delivery by the valve and differ among fluidic delivery devices is compensated to optimize the flow rate accuracy.

    摘要翻译: 提高流体输送装置中阀(10)的流量的精度,其中可以通过改变阀的占空比来实现期望的流速。 通过使阀门的电压开启时间最小化以解决阀门和压电致动器(53)漂移,从而使阀门在其寿命期间的流体输送流量得到稳定。 此外,补偿了一个或多个流体参数的阀门开启时间,其影响阀的流速输送并且在流体输送装置之间不同,以优化流速精度。

    Continuous phase frequency shift keying modulation during wireless transmissions in a closed system while minimizing power consumption
    10.
    发明公开
    Continuous phase frequency shift keying modulation during wireless transmissions in a closed system while minimizing power consumption 有权
    在无线传输连续相位频移,在封闭体系与能量消耗的最小化

    公开(公告)号:EP1788767A1

    公开(公告)日:2007-05-23

    申请号:EP06255855.6

    申请日:2006-11-15

    发明人: Crivelli, Rocco

    IPC分类号: H04L27/20 A61M5/142

    摘要: Continuous phase frequency shift keying modulation is employed during wireless transmission from an internal device to an external device to increase robustness of transmissions. The continuous phase frequency shift keying processor receives as input an incoming data stream and includes a timer for toggling its output between a first predetermined frequency and a second predetermined frequency on a predetermined time period basis based on the logical state of each bit in the incoming data stream. For a portion of time while the counter or timer of the CPFSK processor is counting down the predetermined time period associated with the detected logic state of a particular bit of the incoming data signal at least some of the other circuitry, preferably all of the other circuitry of the processor, is toggled to a sleep mode in which power is cut off thereby minimizing power consumption by the processor during this interim state.

    摘要翻译: 无线传输过程中使用连续相位频移键控调制从内部设备在外部装置,以增加传输的鲁棒性。 连续相频移键控处理器接收作为输入到输入数据流,并且包括用于切换第一预定频率和基于每个比特的输入数据的逻辑状态的预定时间段的基础上在第二预定频率之间其输出定时器 流。 的时间,而CPFSK处理器的计数器或定时器倒计时与输入数据信号的特定比特的检测到的逻辑状态相关联的预定的时间段中的至少一些其他电路,优选所有的其它电路的一部分 处理器,被切换到在哪个功率由处理器在这个中间状态切断,从而最小化功耗的睡眠模式。