公开(公告)号：EP0352082B1

公开(公告)日：1996-11-13

申请号：EP89307295.9

申请日：1989-07-19

申请人： DIGITAL EQUIPMENT CORPORATION

发明人： Grundmann, William J. ,  Madden, William C. ,  Uhler, George M.

IPC分类号： G06F9/26 ,  G06F7/00

CPC分类号： G06F7/785 ,  G06F9/26 ,  G06F9/265 ,  G06F9/30134

公开(公告)号：EP0352082A3

公开(公告)日：1993-01-07

申请号：EP89307295.9

申请日：1989-07-19

申请人： DIGITAL EQUIPMENT CORPORATION

发明人： Grundmann, William J. ,  Madden, William C. ,  Uhler, George M.

IPC分类号： G06F9/26 ,  G06F7/00

CPC分类号： G06F7/785 ,  G06F9/26 ,  G06F9/265 ,  G06F9/30134

摘要： A memory stack used for storing microinstruction addresses in a pipelined CPU is constructed as a last-in, first-out memory using a stack pointer which applies a read control to one location of the stack and applies a write control to the next higher location. An uncondi­tional read and write is done every machine cycle, before a microinstruction could be decoded, then the data on the read bus, or data from the write bus, is used and the pointer is incremented or decremented if a stack Push or Pop is decoded. These correspond to a Call or Return microinstruction. Thus the delay in decoding the micro­instruction does not prevent completion of the stack operation in one machine cycle.

公开(公告)号：EP0352082A2

公开(公告)日：1990-01-24

申请号：EP89307295.9

申请日：1989-07-19

申请人： DIGITAL EQUIPMENT CORPORATION

发明人： Grundmann, William J. ,  Madden, William C. ,  Uhler, George M.

IPC分类号： G06F9/26 ,  G06F7/00

CPC分类号： G06F7/785 ,  G06F9/26 ,  G06F9/265 ,  G06F9/30134

摘要： A memory stack used for storing microinstruction addresses in a pipelined CPU is constructed as a last-in, first-out memory using a stack pointer which applies a read control to one location of the stack and applies a write control to the next higher location. An uncondi­tional read and write is done every machine cycle, before a microinstruction could be decoded, then the data on the read bus, or data from the write bus, is used and the pointer is incremented or decremented if a stack Push or Pop is decoded. These correspond to a Call or Return microinstruction. Thus the delay in decoding the micro­instruction does not prevent completion of the stack operation in one machine cycle.

摘要翻译： 用于存储流水线CPU中的微指令地址的存储器堆栈被构建为使用堆栈指针的先进先出存储器，其将读控制应用于堆栈的一个位置，并将写控制应用于下一较高位置。 每个机器周期执行无条件的读写操作，在微指令可以被解码之前，然后使用读总线上的数据或来自写总线的数据，并且如果堆栈Push或Pop被解码，则指针被递增或递减 。 这些对应于呼叫或返回微指令。 因此，解码微指令的延迟并不能防止在一个机器周期中完成堆栈操作。