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公开(公告)号:EP0176409A3
公开(公告)日:1987-05-06
申请号:EP85401717
申请日:1985-09-05
发明人: Strain, Robert
IPC分类号: H01L29/16
CPC分类号: H01L27/0921 , H01L21/26506 , H01L29/0847 , H01L29/167 , Y10S148/061 , Y10S438/918
摘要: The tendency of a CMOS circuit to latch up is reduced by implanting ions of germanium or tin into the source and drain regions of the circuit. The low energy gap of these ions lowers the band gap of the source and drain regions, which in turn inhibits their ability to inject carriers into the substrate and well.