DATA PROCESSOR HAVING MULTIPLE LOW POWER MODES
    1.
    发明公开
    DATA PROCESSOR HAVING MULTIPLE LOW POWER MODES 有权
    具有多NIEDRIGLEISTUNGSMODI数据处理器

    公开(公告)号:EP2577422A4

    公开(公告)日:2016-08-10

    申请号:EP11787069

    申请日:2011-04-20

    IPC分类号: G06F1/32 G06F1/26

    摘要: A processor includes a first virtual terminal, a second virtual terminal, circuitry coupled to the first virtual terminal for providing current to the first virtual terminal, a first regulating transistor coupled between the first virtual terminal and the second virtual terminal, a first disabling transistor coupled in parallel with the first regulating transistor for selectively disabling the first regulating transistor by directly connecting the second virtual terminal to the first virtual terminal, a second regulating transistor coupled between the second virtual terminal and a first power supply voltage terminal, and a second disabling transistor coupled in parallel with the second regulating transistor for selectively disabling the second regulating transistor by directly connecting the second virtual terminal to the first power supply voltage terminal.