公开(公告)号：EP1802054A3

公开(公告)日：2012-09-05

申请号：EP07104202.2

申请日：1994-09-30

申请人： Fujitsu Semiconductor Limited

发明人： Hanaoka, Hidetoshi

IPC分类号： H04Q11/04 ,  H04L12/56

CPC分类号： H04L49/25 ,  H04L12/5601 ,  H04L49/10 ,  H04L49/15 ,  H04L49/20 ,  H04L49/256 ,  H04L49/30 ,  H04L49/3009 ,  H04L49/45 ,  H04L49/50 ,  H04L2012/5647 ,  H04L2012/5651 ,  H04L2012/5678 ,  H04Q11/0478

摘要： An ATM switching device comprising: at least one ATM switch element (SWEi); and means (Lli) for appending an emergency identification bit (EM) indicating whether or not an incoming ATM cell (Ci) is an urgent ATM cell, to the head of said ATM cell. When an ATM cell whose emergency identification bit represents a given logical value arrives at said ATM switch element, the ATM switch element holds all of ATM cells, other than ATM cells whose emergency identification bits represent said given logical values and which reside in the ATM switch element, in a congestion control memory buffer (MBi), so as to effect a switching of the urgent ATM cell as a top priority.