LINE CARD FRAME, MULTI-FRAME CLUSTER ROUTER, ROUTING, AND MESSAGE PROCESSING

    公开(公告)号:EP3382935A1

    公开(公告)日:2018-10-03

    申请号:EP16868004.9

    申请日:2016-11-24

    发明人: YANG, Wu

    IPC分类号: H04L12/00

    摘要: Disclosed is a line card chassis including line card units, switch fabric units and optical fiber interface units. The switch fabric unit includes a switch fabric chip module, and an onboard optical assembly module for mutual conversion between an optical signal and electrical signal; an electrical signal interface of the onboard optical assembly module connects the switch fabric chip module having a switching and route-selecting function, and the switch fabric chip module connects a line card unit through an electrical connector; an optical signal interface of the onboard optical assembly module connects an optical fiber interface unit through an optical connector; the optical fiber interface unit couples the optical signal to a cluster interface on a router panel through an optical fiber; the cluster interface concatenates different chassis of the router. Also disclosed is a router applying the line card chassis, a route- selecting method, and a packet processing method.

    A RECURSIVE CONCENTRATOR CIRCUIT AND ITS APPLICATION AS BUILDING BLOCK OF AN INTERCONNECTION NETWORK

    公开(公告)号:EP3334106A1

    公开(公告)日:2018-06-13

    申请号:EP16202555.5

    申请日:2016-12-06

    申请人: TU Kaiserslautern

    IPC分类号: H04L12/933 H04L12/24

    CPC分类号: H04L49/15 H04L49/10

    摘要: The present inventions relates to a concentrator for a nonblocking interconnection network, comprising a plurality of n global input ports and a plurality of n global output ports for processing m inputs to m outputs, wherein m ≤ n, and wherein each input x[i] includes data bits data(x[i]) and a single valid bit valid(x[i]), and wherein the concentrator comprises a plurality of routing circuits collectively coupling the plurality of global inputs to the plurality of global outputs in a nonblocking manner, wherein the concentrator comprises log 2 (n) columns with n/2 rows of 2x2 crossbar switches, wherein the crossbar switches of each of the log 2 (n) columns are connected with corresponding crossbar switches of the next column starting from the n global inputs to the n global outputs, wherein a module for configuring the crossbar switches is comprised, wherein the configuration of the switches is based on the parity of the validities of the respective column and wherein the parity of the validities of the all columns are computed in parallel.

    SWITCHING DEVICE BASED ON REORDERING ALGORITHM
    6.
    发明公开
    SWITCHING DEVICE BASED ON REORDERING ALGORITHM 审中-公开
    基于重排序算法的交换设备

    公开(公告)号:EP3223480A1

    公开(公告)日:2017-09-27

    申请号:EP17162393.7

    申请日:2017-03-22

    IPC分类号: H04L12/937

    摘要: The present invention discloses a switching device based on a reordering algorithm, so as to simplify a switching design, increase a quantity of ports, and avoid causing trouble to a backend. The switching device in embodiments of the present invention includes: a processor, an input buffer, an output buffer, and a Banyan switching architecture, where the processor is configured to convert an initial switching table to a non-congestion switching table and an order-adjustment table by using a preset reordering algorithm; the input buffer is configured to save first period data that is from an input port; the processor is further configured to perform, by using the non-congestion switching table, data switching on data in the first full-period data saved in the input buffer, to obtain second full-period data; the Banyan switching architecture is configured to perform synchronous data switching on the second full-period data; the output buffer is configured to save the second full-period data on which the synchronous data switching has been performed; the processor is further configured to adjust, by using the order-adjustment table, a data order of the second period data on which the synchronous data switching has been performed and that is saved in the output buffer, to obtain third period data.

    摘要翻译: 本发明公开了一种基于重排序算法的交换设备,以简化交换设计,增加端口数量,避免给后端造成麻烦。 本发明实施例中的交换设备包括:处理器,输入缓存,输出缓存和Banyan交换架构,处理器用于将初始交换表转换为非拥塞交换表, 通过使用预置重排序算法来调整表格; 输入缓冲器被配置为保存来自输入端口的第一周期数据; 所述处理器,还用于通过所述非拥塞倒换表,对保存在所述输入缓存中的所述第一全周期数据进行数据倒换,得到第二全周期数据; Banyan交换架构被配置为对第二全周期数据执行同步数据交换; 输出缓冲器被配置为保存已经执行了同步数据切换的第二全周期数据; 所述处理器还用于通过所述顺序调整表调整所述同步数据切换已经完成并保存在所述输出缓存中的第二周期数据的数据顺序,得到第三周期数据。

    METHODS AND APPARATUS FOR DYNAMIC RESOURCE MANAGEMENT WITHIN A DISTRIBUTED CONTROL PLANE OF A SWITCH
    7.
    发明授权
    METHODS AND APPARATUS FOR DYNAMIC RESOURCE MANAGEMENT WITHIN A DISTRIBUTED CONTROL PLANE OF A SWITCH 有权
    用于在开关的分布式控制平面内的动态资源管理的方法和设备

    公开(公告)号:EP2466826B1

    公开(公告)日:2017-09-20

    申请号:EP11192571.5

    申请日:2011-12-08

    IPC分类号: H04L12/937 H04L12/933

    摘要: In some embodiments, a switch fabric system includes multiple access switches configured to be operatively coupled to a switch fabric. The multiple access switches include multiple ports each to be operatively coupled to a peripheral processing device. A first set of ports from the multiple ports and a second set of ports from the multiple ports are managed by a first network control entity when the switch fabric system is in a first configuration. The first set of ports is managed by the first network control entity and the second set of ports is managed by a second network control entity when the switch fabric system is in a second configuration. The second network control entity is automatically initiated when the system is changed from the first configuration to the second configuration.

    摘要翻译: 在一些实施例中,交换结构系统包括被配置成可操作地耦合到交换结构的多个接入交换机。 多路访问交换机包括多个端口,每个端口可操作地耦合到外围处理设备。 当交换结构系统处于第一配置时,第一网络控制实体管理来自多个端口的第一组端口和来自多个端口的第二组端口。 当交换结构系统处于第二配置时,第一组端口由第一网络控制实体管理,并且第二组端口由第二网络控制实体管理。 当系统从第一配置改变为第二配置时,第二网络控制实体自动启动。

    ENSURING ANY-TO-ANY REACHABILITY WITH OPPORTUNISTIC LAYER 3 FORWARDING IN MASSIVE SCALE DATA CENTER ENVIRONMENTS
    10.
    发明公开
    ENSURING ANY-TO-ANY REACHABILITY WITH OPPORTUNISTIC LAYER 3 FORWARDING IN MASSIVE SCALE DATA CENTER ENVIRONMENTS 有权
    确保与机会主义的3层路由PUBLIC互访非常大的数据中心环境

    公开(公告)号:EP2907279A1

    公开(公告)日:2015-08-19

    申请号:EP13779449.1

    申请日:2013-09-30

    摘要: Techniques are provided for updating routing tables of switch devices. At a first switch device of a first rack unit in a network, information is received about addresses of host devices in the network. The addresses are stored in a software cache. A packet is received from a first host device assigned to a first subnet and housed in the first rack unit. The packet is destined for a second host device assigned to a second subnet and housed in a second rack unit in the network. The packet is forwarded using the subnet entry and it may remain sub-optimal during a period before which an entry can be installed form a software cache. The software cache is evaluated to determine the address of the second host device. The packet is then forwarded optimally. This will ensure any-to-any communications in the network initially sub-optimally and subsequently optimally.