公开(公告)号：EP0436958B1

公开(公告)日：1997-10-08

申请号：EP90125766.7

申请日：1990-12-28

申请人： HITACHI, LTD.

发明人： Takahashi, Yasushi ,  Amada, Eiichi ,  Ando, Kimiaki ,  Miyata, Masanori

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04Q11/04 ,  H04J3/0605 ,  H04Q11/0001 ,  H04Q11/0066

公开(公告)号：EP0436958A3

公开(公告)日：1992-12-09

申请号：EP90125766.7

申请日：1990-12-28

申请人： HITACHI, LTD.

发明人： Takahashi, Yasushi ,  Amada, Eiichi ,  Ando, Kimiaki ,  Miyata, Masanori

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04Q11/04 ,  H04J3/0605 ,  H04Q11/0001 ,  H04Q11/0066

摘要： A cell signal processing circuit is provided which is capable of precisely extracting a timing signal and a cell synchronizing signal. The cell signal processing circuit is principally composed of an signal adder circuit (2) for adding a dummy signal comprising bit signals in a direct current balanced state to an end portion of respective inputted time series cell signals, and a separator circuit (12) for separating and out-putting the time series cell signals. The dummy signal composed of the same number of bits "0" and "1" is added to input signals in the form of time series cells such that signal cells are exchanged at a time of a bit "0" in the dummy signal. An optical switch apparatus using the above-mentioned cell signal processing circuit as an optical switch array (8) is also provided which includes a photoelectric converter (9) for converting the time series optical cell signal to an electric signal, a clock recovery circuit (13) for extracting a clock signal from an output from the photoelectric converter, a cell synchronization circuit (14) for extracting a cell synchronizing signal from the output from the photoelectric converter, and a decision circuit (11) for decision the output from the photoelectric converter by the use of the clock signal. The optical switch apparatus of the invention has a simple circuit arrangement which is not influenced by data loss and jitter.

公开(公告)号：EP0436958A2

公开(公告)日：1991-07-17

申请号：EP90125766.7

申请日：1990-12-28

申请人： HITACHI, LTD.

发明人： Takahashi, Yasushi ,  Amada, Eiichi ,  Ando, Kimiaki ,  Miyata, Masanori

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04Q11/04 ,  H04J3/0605 ,  H04Q11/0001 ,  H04Q11/0066

摘要： A cell signal processing circuit is provided which is capable of precisely extracting a timing signal and a cell synchronizing signal. The cell signal processing circuit is principally composed of an signal adder circuit (2) for adding a dummy signal comprising bit signals in a direct current balanced state to an end portion of respective inputted time series cell signals, and a separator circuit (12) for separating and out-putting the time series cell signals. The dummy signal composed of the same number of bits "0" and "1" is added to input signals in the form of time series cells such that signal cells are exchanged at a time of a bit "0" in the dummy signal. An optical switch apparatus using the above-mentioned cell signal processing circuit as an optical switch array (8) is also provided which includes a photoelectric converter (9) for converting the time series optical cell signal to an electric signal, a clock recovery circuit (13) for extracting a clock signal from an output from the photoelectric converter, a cell synchronization circuit (14) for extracting a cell synchronizing signal from the output from the photoelectric converter, and a decision circuit (11) for decision the output from the photoelectric converter by the use of the clock signal. The optical switch apparatus of the invention has a simple circuit arrangement which is not influenced by data loss and jitter.

摘要翻译： 提供一种能够精确地提取定时信号和单元同步信号的单元信号处理电路。 单元信号处理电路主要由信号加法电路（2）构成，信号加法电路（2）将包含直流平衡状态的位信号的虚拟信号与各输入的时间序列单元信号的端部相加，分离电路（12） 分离并输出时间序列信号。 由相同数量的位“0”和“1”组成的虚拟信号以时间序列单元的形式被添加到输入信号中，使得信号单元在虚拟信号中在位“0”的时间被交换。 还提供了一种使用上述单元信号处理电路作为光开关阵列（8）的光开关装置，其包括用于将时间序列光信号信号转换为电信号的光电转换器（9），时钟恢复电路 13），用于从光电转换器的输出提取时钟信号，用于从光电转换器的输出提取单元同步信号的单元同步电路（14）和用于判定光电转换器的输出的判定电路（11） 转换器通过使用时钟信号。 本发明的光开关装置具有简单的电路布置，不受数据丢失和抖动的影响。