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公开(公告)号：EP3783484A1
公开(公告)日：2021-02-24
申请号：EP19810599.1
申请日：2019-05-22
发明人： GAO, Xiong , LI, Wei , ZHENG, Ming , LAM, Hou Fun
IPC分类号： G06F9/48
摘要： Embodiments of this application disclose a data processing method. The method in the embodiments of this application includes: generating, by a computer device, a target task, where the target task includes a buffer application task or a buffer release task, the target task is a successive task of a first task and is a preceding task of a second task, the first task and the second task are to-be-executed tasks between which there is a sequential dependency relationship, and when the target task is the buffer application task, a buffer corresponding to the buffer application task is used when the second task is executed, or when the target task is the buffer release task, a buffer corresponding to the buffer release task is used when the first task is executed; and after a preceding task of the target task is executed and before a successive task of the target task is executed, obtaining, by the computer device based on the target task, a buffer entry corresponding to the target task, where the buffer entry is an entry including a memory size of a buffer corresponding to the target task, a memory location of the buffer, and a memory address of the buffer, and executing the target task to apply for or release the buffer corresponding to the target task.
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公开(公告)号：EP4258175A1
公开(公告)日：2023-10-11
申请号：EP21914156.1
申请日：2021-12-23
发明人： ZHANG, Zhaochuang , GAO, Xiong , ZENG, Zitao
IPC分类号： G06N3/08
摘要： Embodiments of this application disclose a node fusion method for a computational graph and a device, which may be used in the artificial intelligence field, and may be specifically used in a deep learning framework. The method includes: converting a neural network into a computational graph; extracting one or more parallelizable branch groups from the computational graph based on a dependency relationship between nodes in the computational graph, where the dependency relationship indicates at least one of the following relationships: the parallelizable branch group has a common parent node, the parallelizable branch group has a common child node, the parallelizable branch group has no parent node, and the parallelizable branch group has no child node; and finally, fusing a plurality of nodes in any parallelizable branch group that respectively belong to different sub-branches to obtain a new computational graph. In this application, possibilities of some other parallelizable branches are considered, so that parallelizable branch combinations different from those defined by a rule in the conventional technology are found, and nodes in the branch combinations may be fused during node fusion of a computational graph. This extends a range of nodes that support fusion and that can be obtained.
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公开(公告)号：EP4372572A2
公开(公告)日：2024-05-22
申请号：EP24151801.8
申请日：2019-05-22
发明人： GAO, Xiong , LI, Wei , ZHENG, Ming , LAM, Hou Fun
IPC分类号： G06F13/28
CPC分类号： G06F9/4881 , G06F2209/48420130101 , G06F9/5016 , G06F2209/501120130101 , G06F9/5022
摘要： Embodiments of this application disclose a data processing method. The method in the embodiments of this application includes: generating, by a computer device, a target task, where the target task includes a buffer application task or a buffer release task, the target task is a successive task of a first task and is a preceding task of a second task, the first task and the second task are to-be-executed tasks between which there is a sequential dependency relationship, and when the target task is the buffer application task, a buffer corresponding to the buffer application task is used when the second task is executed, or when the target task is the buffer release task, a buffer corresponding to the buffer release task is used when the first task is executed; and after a preceding task of the target task is executed and before a successive task of the target task is executed, obtaining, by the computer device based on the target task, a buffer entry corresponding to the target task, where the buffer entry is an entry including a memory size of a buffer corresponding to the target task, a memory location of the buffer, and a memory address of the buffer, and executing the target task to apply for or release the buffer corresponding to the target task.
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公开(公告)号：EP3404540A1
公开(公告)日：2018-11-21
申请号：EP17746943.4
申请日：2017-01-25
发明人： GAO, Xiong , WU, Jie , LI, Baosong
IPC分类号： G06F9/50
CPC分类号： H04L47/2441 , G06F9/50 , H04L12/66 , H04L49/3027 , H04L49/3063 , H04L49/90
摘要： Embodiments of the present invention provide a data flow processing method and apparatus, and a system. A processing process performed on a packet is divided into multiple processing actions. Some processing actions are spread only when traffic of a current data flow meets a preset condition. Therefore, multiple processor cores may process a packet in a pipeline manner, so as to improve processing efficiency. When a bandwidth fluctuation amplitude of a data flow is relatively large and a peek bandwidth of the data flow is relatively large, compared with a static pipeline manner, the method provided in the embodiments of present invention avoids a waste of processing resources to some extent when traffic is relatively low, and can also better support data flow processing when traffic is relatively high.
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公开(公告)号：EP4459463A2
公开(公告)日：2024-11-06
申请号：EP24176511.4
申请日：2019-01-07
发明人： LI, Wei , GAO, Xiong , LAM, Hou Fun , MA, Tao
IPC分类号： G06F9/48
摘要： A task processing method, a processing apparatus, and a computer system are provided. Implementation of the method includes: generating, by a first processing apparatus (210), a plurality of tasks, and determining task description information of the plurality of tasks, where the task description information of the plurality of tasks is used to indicate a dependency relationship between the plurality of tasks (301); sending an instruction to a second processing apparatus (220), where the instruction includes the plurality of tasks and the task description information of the plurality of tasks (302); and receiving the instruction, and processing the plurality of tasks based on the dependency relationship between the plurality of tasks (303). The method can effectively reduce a waiting delay, fully exploit a computing capability of an acceleration chip, and improve task processing efficiency.
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公开(公告)号：EP4372572A3
公开(公告)日：2024-07-17
申请号：EP24151801.8
申请日：2019-05-22
发明人： GAO, Xiong , LI, Wei , ZHENG, Ming , LAM, Hou Fun
CPC分类号： G06F9/4881 , G06F2209/48420130101 , G06F9/5016 , G06F2209/501120130101 , G06F9/5022
摘要： Embodiments of this application disclose a data processing method. The method in the embodiments of this application includes: generating, by a computer device, a target task, where the target task includes a buffer application task or a buffer release task, the target task is a successive task of a first task and is a preceding task of a second task, the first task and the second task are to-be-executed tasks between which there is a sequential dependency relationship, and when the target task is the buffer application task, a buffer corresponding to the buffer application task is used when the second task is executed, or when the target task is the buffer release task, a buffer corresponding to the buffer release task is used when the first task is executed; and after a preceding task of the target task is executed and before a successive task of the target task is executed, obtaining, by the computer device based on the target task, a buffer entry corresponding to the target task, where the buffer entry is an entry including a memory size of a buffer corresponding to the target task, a memory location of the buffer, and a memory address of the buffer, and executing the target task to apply for or release the buffer corresponding to the target task.
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公开(公告)号：EP3786793A1
公开(公告)日：2021-03-03
申请号：EP19802616.3
申请日：2019-01-07
发明人： LI, Wei , GAO, Xiong , LAM, Hou Fun , MA, Tao
IPC分类号： G06F9/46
摘要： A task processing method, a processing apparatus, and a computer system are provided. Implementation of the method includes: generating, by a first processing apparatus (210), a plurality of tasks, and determining task description information of the plurality of tasks, where the task description information of the plurality of tasks is used to indicate a dependency relationship between the plurality of tasks (301); sending an instruction to a second processing apparatus (220), where the instruction includes the plurality of tasks and the task description information of the plurality of tasks (302); and receiving the instruction, and processing the plurality of tasks based on the dependency relationship between the plurality of tasks (303). The method can effectively reduce a waiting delay, fully exploit a computing capability of an acceleration chip, and improve task processing efficiency.
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