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    TASK PROCESSING METHOD, PROCESSING APPARATUS, AND COMPUTER SYSTEM
    1.
    发明公开
    TASK PROCESSING METHOD, PROCESSING APPARATUS, AND COMPUTER SYSTEM 审中-公开

    公开(公告)号：EP4459463A2

    公开(公告)日：2024-11-06

    申请号：EP24176511.4

    申请日：2019-01-07

    申请人： Huawei Technologies Co., Ltd.

    发明人： LI, Wei ,  GAO, Xiong ,  LAM, Hou Fun ,  MA, Tao

    IPC分类号： G06F9/48

    摘要： A task processing method, a processing apparatus, and a computer system are provided. Implementation of the method includes: generating, by a first processing apparatus (210), a plurality of tasks, and determining task description information of the plurality of tasks, where the task description information of the plurality of tasks is used to indicate a dependency relationship between the plurality of tasks (301); sending an instruction to a second processing apparatus (220), where the instruction includes the plurality of tasks and the task description information of the plurality of tasks (302); and receiving the instruction, and processing the plurality of tasks based on the dependency relationship between the plurality of tasks (303). The method can effectively reduce a waiting delay, fully exploit a computing capability of an acceleration chip, and improve task processing efficiency.

    DATA PROCESSING SYSTEM AND METHOD
    2.
    发明公开
    DATA PROCESSING SYSTEM AND METHOD 审中-公开

    公开(公告)号：EP4439316A1

    公开(公告)日：2024-10-02

    申请号：EP22906330.0

    申请日：2022-12-06

    申请人： Huawei Technologies Co., Ltd.

    发明人： YIN, Wen ,  LI, Wei ,  ZHOU, Yigang ,  WU, Manbo ,  LIN, Xianzhou ,  WEN, Chuanwei ,  WANG, Ruonan ,  LI, Yining

    IPC分类号： G06F13/16

    CPC分类号： Y02D10/00 ,  G06F13/42 ,  G06F13/16

    摘要： A data processing system and method are provided. The system includes a computing subsystem (100) and a memory subsystem (200), and the computing subsystem (100) and the memory subsystem (200) are connected through a high-speed parallel bus (300). In the computing subsystem (100), a processor may be connected to one end of the high-speed parallel bus (300) via a first bus interface (110). The processor transmits, via the first bus interface (110) to the memory subsystem (200) through the high-speed parallel bus (300), data that needs to be sent; and receives, via the first bus interface (110), data transmitted through the high-speed parallel bus (300). A second bus interface (210) in the memory subsystem (200) is connected to the high-speed parallel bus (300). The memory subsystem (200) receives, via the second bus interface (210), data transmitted through the high-speed parallel bus (300); and transmits, via the second bus interface (210), data to the computing subsystem (100) through the high-speed parallel bus (300). A data transmission rate of the high-speed parallel bus (300) is higher, the bus interfaces at the two ends of the high-speed parallel bus (300) can implement higher-order modulation, and a larger amount of data can be transmitted in a periodicity, to improve efficiency of data transmission between the computing subsystem (100) and the memory subsystem (200).

    DATA PROCESSING METHOD AND COMPUTER DEVICE
    3.
    发明公开
    DATA PROCESSING METHOD AND COMPUTER DEVICE 审中-实审

    公开(公告)号：EP4372572A3

    公开(公告)日：2024-07-17

    申请号：EP24151801.8

    申请日：2019-05-22

    申请人： Huawei Technologies Co., Ltd.

    发明人： GAO, Xiong ,  LI, Wei ,  ZHENG, Ming ,  LAM, Hou Fun

    IPC分类号： G06F9/48 ,  G06F9/50 ,  G06F13/28

    CPC分类号： G06F9/4881 ,  G06F2209/48420130101 ,  G06F9/5016 ,  G06F2209/501120130101 ,  G06F9/5022

    摘要： Embodiments of this application disclose a data processing method. The method in the embodiments of this application includes: generating, by a computer device, a target task, where the target task includes a buffer application task or a buffer release task, the target task is a successive task of a first task and is a preceding task of a second task, the first task and the second task are to-be-executed tasks between which there is a sequential dependency relationship, and when the target task is the buffer application task, a buffer corresponding to the buffer application task is used when the second task is executed, or when the target task is the buffer release task, a buffer corresponding to the buffer release task is used when the first task is executed; and after a preceding task of the target task is executed and before a successive task of the target task is executed, obtaining, by the computer device based on the target task, a buffer entry corresponding to the target task, where the buffer entry is an entry including a memory size of a buffer corresponding to the target task, a memory location of the buffer, and a memory address of the buffer, and executing the target task to apply for or release the buffer corresponding to the target task.

    RESONATOR AND PREPARATION METHOD THEREFOR
    4.
    发明公开
    RESONATOR AND PREPARATION METHOD THEREFOR 审中-公开

    公开(公告)号：EP4333297A1

    公开(公告)日：2024-03-06

    申请号：EP22804095.2

    申请日：2022-05-23

    申请人： Huawei Technologies Co., Ltd.

    发明人： WU, Wei ,  LI, Hao ,  WANG, Jinhui ,  LI, Wei

    IPC分类号： H03H9/02 ,  H03H3/02

    摘要： A resonator is provided. The resonator includes a resonance layer, a substrate, and a barrier layer. The barrier layer is located on the substrate, and the barrier layer and the substrate form a cavity. The cavity is configured to accommodate the resonance layer. The barrier layer includes a top wall and a side wall, and an inner surface of the side wall surrounds the resonance layer. An outer surface of the side wall includes a groove, and the groove surrounds the side wall. Based on the foregoing implementation, complexity of a machining process of the resonator is reduced, machining costs are reduced, and reliability of the resonator is improved on the basis of ensuring miniaturization of the resonator.

    RESONATOR AND ELECTRONIC COMPONENT
    5.
    发明公开
    RESONATOR AND ELECTRONIC COMPONENT 审中-公开

    公开(公告)号：EP4322406A1

    公开(公告)日：2024-02-14

    申请号：EP22794237.2

    申请日：2022-01-28

    申请人： Huawei Technologies Co., Ltd.

    发明人： WU, Wei ,  LI, Wei ,  WANG, Jinhui ,  LI, Hao ,  SU, Hongliang

    IPC分类号： H03H9/02

    摘要： This application discloses a resonator and an electronic component and relates to the field of acoustic wave frequency selection technologies. The resonator includes a substrate (1), a first electrode layer (2), a piezoelectric layer (3) and a second electrode layer (4) sequentially stacked. At least one of the first electrode layer (2) and the second electrode layer (4) includes a first protrusion (6). The first protrusion (6) protrudes toward the piezoelectric layer (3). The first protrusion (6) includes a first edge protrusion (61), the first edge protrusion (61) surrounds at least a part of a side of the piezoelectric layer (3). According to this application, acoustic waves can be converged at a central axis of the piezoelectric layer (3), to enhance a convergence effect of the acoustic waves, reduce transverse leakage of the acoustic waves, increase a Q value of a bulk acoustic wave resonator, and reduce an insertion loss. In addition, enhancement of the convergence effect of the acoustic waves can reduce a spurious acoustic wave, suppress a transverse spurious mode, and improve a phase noise characteristic of the bulk acoustic wave resonator, thereby achieving a pure frequency of an electrical signal output by the bulk acoustic wave resonator.

    FEEDBACK METHOD AND RELATED DEVICE
    7.
    发明公开
    FEEDBACK METHOD AND RELATED DEVICE 审中-公开

    公开(公告)号：EP4261660A1

    公开(公告)日：2023-10-18

    申请号：EP21914315.3

    申请日：2021-12-28

    申请人： Huawei Technologies Co., Ltd.

    发明人： LIU, Yishuo ,  HUANG, Da-Yuan ,  LI, Wei ,  YAN, Che ,  ZHOU, Xuan ,  ZHAO, Yunjing ,  LIANG, Alice Jing Fei ,  LI, Hongting ,  HUANG, Xueyan ,  WANG, Zhuo

    IPC分类号： G06F3/01

    摘要： This application relates to the field of human-computer interaction. An embodiment provides a feedback method, applied to an electronic device provided with a touchscreen. The touchscreen is provided with a plurality of vibration feedback elements. The method includes: detecting a first contact operation acting on the touchscreen, and obtaining first location information of a first contact point corresponding to the first contact operation, where the first location information corresponds to a first virtual key on a virtual keyboard; if the first virtual key is an anchor point key, obtaining, from the plurality of vibration feedback elements, a first vibration feedback element that matches the first virtual key, and indicating the first vibration feedback element to emit a vibration wave, to prompt that the first virtual key is an anchor point key, so that the user can sense a location of the anchor point key. This can reduce difficulty in implementing touch typing on the touchscreen.

    ERROR CORRECTION METHOD AND APPARATUS
    8.
    发明公开
    ERROR CORRECTION METHOD AND APPARATUS 审中-公开

    公开(公告)号：EP4246329A1

    公开(公告)日：2023-09-20

    申请号：EP21899740.1

    申请日：2021-10-14

    申请人： Huawei Technologies Co., Ltd.

    发明人： LI, Yuwei ,  ZHANG, Xu ,  LI, Wei ,  ZHANG, Kun ,  YIN, Wen

    IPC分类号： G06F11/10

    摘要： An error correction method and apparatus are provided. A register controller may detect an error existing in a memory, and after detecting a UCE, may obtain a memory address in which the UCE occurs. The register controller reads raw data from a location indicated by the memory address, stores preset first data in the location indicated by the memory address, and reads second data from the location after storing the first data in the location; compares the first data with the second data to determine a first failure location in the location; and determines raw data stored in the first failure location from the raw data in the location, and performs error correction on the raw data stored in the first failure location. The register controller can accurately position the failure location in which the UCE occurs by performing data write and read operations, to perform error correction on raw data stored in the failure location. Such a manner of positioning a failure location is more efficient, and further reduces occurrences of UCEs and improves stability of the memory.