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1.发明公开A computer apparatus having special instructions to force ordered load and store operations 失效强制计算装置与特殊命令到更高级别的加载和存储操作。
公开(公告)号：EP0679993A3
公开(公告)日：1996-09-11
申请号：EP95302901.4
申请日：1995-04-28
发明人： Morris, Dale C. , Flahive, Barry J. , Ziegler, Michael L. , Huck, Jerome C. , Burger, Stephen G. , Lee, Rugby B.L. , Stumpf, Bernard L. , Kurtze, Jeff
IPC分类号： G06F9/38
CPC分类号： G06F9/3834 , G06F9/30043 , G06F9/30087
摘要： A computer apparatus incorporating special instructions to force load and store operations to execute in program order. The present invention provides a new and novel store instruction that is suspended until all prior store instructions have been completed by an associated CPU. Also, a new load instruction is provided which blocks any subsequent load instructions from executing until this load instruction has been completed by an associated CPU. These instructions allow for high efficiency computer systems to be implemented which optimize instruction throughput by executing subsequent instructions while waiting for a prior instruction to complete.
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2.发明公开A computer apparatus having special instructions to force ordered load and store operations 失效Rechnervorrichtung mit Sonderbefehlen um geordnete Lade- und Speicheroperationen zu zwingen。
公开(公告)号：EP0679993A2
公开(公告)日：1995-11-02
申请号：EP95302901.4
申请日：1995-04-28
发明人： Morris, Dale C. , Flahive, Barry J. , Ziegler, Michael L. , Huck, Jerome C. , Burger, Stephen G. , Lee, Rugby B.L. , Stumpf, Bernard L. , Kurtze, Jeff
IPC分类号： G06F9/38
CPC分类号： G06F9/3834 , G06F9/30043 , G06F9/30087
摘要： A computer apparatus incorporating special instructions to force load and store operations to execute in program order. The present invention provides a new and novel store instruction that is suspended until all prior store instructions have been completed by an associated CPU. Also, a new load instruction is provided which blocks any subsequent load instructions from executing until this load instruction has been completed by an associated CPU. These instructions allow for high efficiency computer systems to be implemented which optimize instruction throughput by executing subsequent instructions while waiting for a prior instruction to complete.
摘要翻译： 一种包含特殊指令的计算机设备，以强制加载和存储操作以程序顺序执行。 本发明提供一种新的和新颖的存储指令，直到所有先前存储指令已经由相关联的CPU完成为止。 此外，提供了一种新的加载指令，其阻止任何后续的加载指令不被执行，直到该加载指令已由相关联的CPU完成。 这些指令允许实现高效率的计算机系统，其通过在等待先前的指令完成的同时执行后续指令来优化指令吞吐量。
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