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公开(公告)号：EP0667678B1
公开(公告)日：1998-01-07
申请号：EP94117379.1
申请日：1994-11-03
IPC分类号： H03K19/0175
CPC分类号： H03K3/356173 , H03K3/037 , H03K3/356156
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公开(公告)号：EP0667678A2
公开(公告)日：1995-08-16
申请号：EP94117379.1
申请日：1994-11-03
IPC分类号： H03K19/0175
CPC分类号： H03K3/356173 , H03K3/037 , H03K3/356156
摘要： A CMOS latch circuit (202) having a second feedback inverter (208) and a switching circuit to switch the second feedback inverter (208) out of the circuit (202) when the latch is being loaded. A first circuit implementation uses a single PFET (212) as the switching circuit, and a second circuit implementation incorporates an NFET transistor (304), in parallel with the PFET (212). In a third circuit implementation, the switching circuit switches power to and from the second feedback inverter rather than switching the output signal of the inverter to reduce the input capacitance of the latch.
摘要翻译： 具有第二反馈反相器（208）的CMOS锁存电路（202）和当锁存器被加载时将第二反馈反相器（208）切换出电路（202）的开关电路。 第一电路实现使用单个PFET（212）作为开关电路，并且第二电路实现结合了与PFET（212）并联的NFET晶体管（304）。 在第三电路实现中，开关电路切换到第二反馈逆变器的功率，而不是切换逆变器的输出信号以减小锁存器的输入电容。
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公开(公告)号：EP0667678A3
公开(公告)日：1996-05-08
申请号：EP94117379.1
申请日：1994-11-03
IPC分类号： H03K19/0175
CPC分类号： H03K3/356173 , H03K3/037 , H03K3/356156
摘要： A CMOS latch circuit (202) having a second feedback inverter (208) and a switching circuit to switch the second feedback inverter (208) out of the circuit (202) when the latch is being loaded. A first circuit implementation uses a single PFET (212) as the switching circuit, and a second circuit implementation incorporates an NFET transistor (304), in parallel with the PFET (212). In a third circuit implementation, the switching circuit switches power to and from the second feedback inverter rather than switching the output signal of the inverter to reduce the input capacitance of the latch.
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