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公开(公告)号：EP4108460A2
公开(公告)日：2022-12-28
申请号：EP22190262.0
申请日：2019-02-06
摘要： In an example, an integrated circuit to drive a plurality of fluid actuation devices includes an interface. In some examples the integrated circuit further includes an analog circuit to output an analog signal to the interface. The integrated circuit may include a timer to override the analog signal on the interface from the analog circuit in response to the timer elapsing.
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公开(公告)号：EP4108461A2
公开(公告)日：2022-12-28
申请号：EP22190268.7
申请日：2019-02-06
摘要： In an example, a fluid ejection die to drive a plurality of fluid actuation devices includes a multipurpose contact pad. In some examples the fluid ejection die may further include a digital circuit to output a digital signal to the multipurpose contact pad. The fluid ejection die may include an analog circuit to output an analog signal to the multipurpose contact pad. In some examples the fluid ejection die further includes control logic to activate the digital circuit or the analog circuit.
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公开(公告)号：EP3688601B1
公开(公告)日：2020-10-07
申请号：EP18821924.0
申请日：2018-12-03
发明人： PANSHIN, Stephen D. , LINN, Scott A
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公开(公告)号：EP3293009A1
公开(公告)日：2018-03-14
申请号：EP17196941.3
申请日：2015-01-30
CPC分类号： B41J2/0451 , B41J2/04501 , B41J2/0458 , B41J2/04581 , B41J2/04586 , B41J2/14153 , B41J2/145 , B41J2/175 , B41J2202/20 , B41J2202/21
摘要： In an example, a printhead (102) comprises a plurality of printhead dies (114), each printhead die including at least one crack sense element (120); and at least one analog bus (150) connected to each printhead die, the at least one analog bus to deliver a known current to at least one crack sense element and to output a voltage to allow a controller to determine whether at least one of the printhead dies is cracked based on the voltage.
摘要翻译： 在一个示例中，打印头（102）包括多个打印头模具（114），每个打印头模具包括至少一个裂纹感测元件（120）; 以及连接到每个打印头管芯的至少一个模拟总线（150），所述至少一个模拟总线用于将已知电流传送到至少一个裂纹感测元件并输出电压以允许控制器确定所述至少一个 打印头模具基于电压而破裂。
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公开(公告)号：EP3954539A1
公开(公告)日：2022-02-16
申请号：EP21200726.4
申请日：2018-12-03
IPC分类号： B41J2/175 , G06K15/00 , H04L12/40 , B41J2/045 , G06F13/42 , G06F12/06 , G06F12/14 , H04L9/32
摘要： In an example, processing circuitry for use with a replaceable print apparatus component comprises a memory and first logic circuit to enable a read operation from the memory and perform processing tasks, the first logic circuit comprising a timer. The processing circuitry may be accessible via an I2C bus of a print apparatus in which the replaceable print apparatus component is installed and may be associated with a first address and at least one second address, and the first address is an I2C address for the first logic circuit. In examples, the first logic circuit is to participate in authentication of the replaceable print apparatus component by a print apparatus in which the replaceable print apparatus component is installed. The circuitry may be configured such that, in response to a first command indicative of a first command time period sent to the first address, the processing circuit is accessible via at least one second address for a duration of the first command time period; and in response to a second command indicative of a second command time period sent to the first address, the first logic circuit is to, for a duration of the second command time period as measured by the timer, ignore I2C traffic sent to the first address
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公开(公告)号：EP3904105A1
公开(公告)日：2021-11-03
申请号：EP21180999.1
申请日：2018-12-03
摘要： In an example, a logic circuitry package is configured to communicate with a print apparatus logic circuit. The logic circuit package may be configured to respond to communications sent to a first address and to at least one second address. The logic circuitry package may comprise a first logic circuit, wherein the first address is an address for the first logic circuit. The package may be configured such that, in response to a first command indicative of a task and a first time period send to the first address, the package is accessible via at least one second address for a duration of the time period.
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公开(公告)号：EP3767480A1
公开(公告)日：2021-01-20
申请号：EP20190995.9
申请日：2018-12-03
发明人： PANSHIN, Stephen D , LINN, Scott A
摘要： In an example, a method includes, in response to a first command sent to an address of logic circuitry associated with a replaceable print apparatus component via a serial data bus, generating, by the logic circuitry, a low voltage condition on the serial data bus. The method may further include monitoring a duration of the low voltage condition using a timer of the logic circuitry.
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公开(公告)号：EP4108461A3
公开(公告)日：2023-03-15
申请号：EP22190268.7
申请日：2019-02-06
摘要： In an example, a fluid ejection die to drive a plurality of fluid actuation devices includes a multipurpose contact pad. In some examples the fluid ejection die may further include a digital circuit to output a digital signal to the multipurpose contact pad. The fluid ejection die may include an analog circuit to output an analog signal to the multipurpose contact pad. In some examples the fluid ejection die further includes control logic to activate the digital circuit or the analog circuit.
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公开(公告)号：EP4108460A3
公开(公告)日：2023-03-08
申请号：EP22190262.0
申请日：2019-02-06
摘要： In an example, an integrated circuit to drive a plurality of fluid actuation devices includes an interface. In some examples the integrated circuit further includes an analog circuit to output an analog signal to the interface. The integrated circuit may include a timer to override the analog signal on the interface from the analog circuit in response to the timer elapsing.
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