LSI microprocessor chip with backward pin compatibility and forward expandable functionality
    1.
    发明公开
    LSI microprocessor chip with backward pin compatibility and forward expandable functionality 失效
    LSI微处理器芯片,具有后置引脚兼容性和前置可扩展功能

    公开(公告)号:EP0177848A3

    公开(公告)日:1988-01-13

    申请号:EP85112234

    申请日:1985-09-26

    发明人: Bradley, John J.

    IPC分类号: G06F15/06 G06F12/06

    摘要: A chip implemented in new technology is designed to include expandable levels of new functionality. The chip includes compatibility circuits which connect to a number of pins which are unused in the chip it replaces in an existing computer system. The compatibility circuits connect to those internal parts of the new chip that contain the newly added or altered levels of functionality. The new chip is installed in the existing computer system just as the prior chip. When so installed, the compatibility circuits enable the new chip to operate in the same manner as the replaced chip but at high speed and with improved performance. When the new chip is installed in the system for which it was designed, the compatibility circuits enable the chip to operate with a selectable level of new functionality at the same higher speed and improved performance.

    LSI microprocessor chip with backward pin compatibility and forward expandable functionality
    3.
    发明公开
    LSI microprocessor chip with backward pin compatibility and forward expandable functionality 失效
    LSI微处理器芯片与向后兼容性和向前膨胀插塞引脚功能。

    公开(公告)号:EP0177848A2

    公开(公告)日:1986-04-16

    申请号:EP85112234.1

    申请日:1985-09-26

    发明人: Bradley, John J.

    IPC分类号: G06F15/06 G06F12/06

    摘要: A chip implemented in new technology is designed to include expandable levels of new functionality. The chip includes compatibility circuits which connect to a number of pins which are unused in the chip it replaces in an existing computer system. The compatibility circuits connect to those internal parts of the new chip that contain the newly added or altered levels of functionality. The new chip is installed in the existing computer system just as the prior chip. When so installed, the compatibility circuits enable the new chip to operate in the same manner as the replaced chip but at high speed and with improved performance. When the new chip is installed in the system for which it was designed, the compatibility circuits enable the chip to operate with a selectable level of new functionality at the same higher speed and improved performance.

    Apparatus and method for converting a number in binary format to a decimal format
    4.
    发明公开
    Apparatus and method for converting a number in binary format to a decimal format 失效
    装置和一个二进制数的格式转换为十进制格式方法。

    公开(公告)号:EP0140158A2

    公开(公告)日:1985-05-08

    申请号:EP84111464.8

    申请日:1984-09-26

    IPC分类号: G06F5/00 H03M7/08

    CPC分类号: H03M7/08

    摘要: A data processing system having a central processing unit (CPU) capable of performing binary and decimal arithmetic software instructions is described. The CPU includes a microprocessor which executes the binary arithmetic software instructions under firmware control. The CPU also includes commercial instruction logic which is used in conjunction with the microprocessor to execute decimal arithmetic operations. The commercial instruction logic also operates under firmware control with the addressing of the firmware microinstructions being controlled by the microprocessor. Also disclosed is the method by which the CPU performs decimal addition, subtraction, multiplication and division arithmetic operations and the method used to convert a number in a binary format to a number in a decimal format and the method used to convert a number in a decimal format to a number in a binary format.