CHUCK FOR COLLECTIVE BONDING OF SEMICONDUCTOR DIES, METHOD OF MAKING THE SAME AND METHODS OF USINGTHE SAME
    2.
    发明公开
    CHUCK FOR COLLECTIVE BONDING OF SEMICONDUCTOR DIES, METHOD OF MAKING THE SAME AND METHODS OF USINGTHE SAME 审中-公开
    西班牙语VURBINDUNG VON HALBLEITERCHIPS

    公开(公告)号:EP3029725A1

    公开(公告)日:2016-06-08

    申请号:EP15185025.2

    申请日:2015-09-14

    申请人: IMEC VZW

    IPC分类号: H01L23/00

    摘要: The present invention is related to a chuck for the collective bonding of semiconductor dies to a target wafer. The chuck of the invention is a substrate comprising on one of its flat surfaces, a number of films of carbon nanotubes, said films being deposited on a number of die placement sites. The CNT films are obtainable by growing the nanotubes on the die placement sites, i.e. the CNTs are attached to the surface of the chuck at one end and the CNTs extend outward from said surface. Preferably the CNT films are deposited in a number of recesses etched in the surface of the chuck. The recesses may have different depths, in order to compensate height differences between a plurality of dies. The CNT films are resilient and thereby give a degree of compliance to the chuck. The films may also perform an adhesive force on the dies that is high in shear direction, which allows the placement accuracy of the dies to be well maintained during bonding. The adhesion force in the normal direction is lower but still sufficient to hold the dies firmly during pre-treatments such as wet cleaning and plasma treatment. Release of the chuck from the bonded dies is easy due to the low normal adhesive force. The CNT films may be pre-compressed so as to lend a higher stability to the films.

    摘要翻译: 本发明涉及一种用于半导体管芯与目标晶片的一体接合的卡盘。 本发明的卡盘是在其平坦表面之一上包含许多碳纳米管膜,所述膜沉积在多个管芯放置位置上。 CNT膜可以通过在管芯放置位置上生长纳米管而获得,即CNT在一端附着到卡盘的表面,并且CNT从所述表面向外延伸。 优选地,CNT膜沉积在蚀刻在卡盘表面中的多个凹槽中。 凹部可以具有不同的深度,以便补偿多个管芯之间的高度差异。 CNT膜是弹性的,从而赋予与卡盘一致的程度。 膜也可以对剪切方向高的模具施加粘合力,这允许在粘合期间模具的放置精度良好地保持。 在正常方向上的粘附力较低,但是仍然足以在诸如湿法清洁和等离子体处理的预处理期间牢固地保持模具。 由于粘合模具的正常粘合力较低,卡盘从粘结模具的脱落容易。 可以对CNT膜进行预压缩,从而为膜提供更高的稳定性。

    PROBING DEVICE FOR TESTING INTEGRATED CIRCUITS
    3.
    发明公开
    PROBING DEVICE FOR TESTING INTEGRATED CIRCUITS 审中-公开
    用于测试集成电路的探测器件

    公开(公告)号:EP3185026A1

    公开(公告)日:2017-06-28

    申请号:EP15202281.0

    申请日:2015-12-23

    申请人: IMEC VZW

    IPC分类号: G01R31/28 G01R1/073

    摘要: The present invention is related to a probing device for electrical testing of ICs, comprising a semiconductor substrate and an anisotropically conducting contactor attached to the substrate. The substrate comprises an integrated circuit portion comprising an array of contact pads on the surface of the substrate. The contactor is attached to the array of pads and comprises an array of probes, each probe being in contact with one pad. The IC portion comprises circuitry for selecting a number of probes and connecting the selected probes to an I/O terminal of the device, for connection to test equipment. According to a particular embodiment, the anisotropically conducting contactor comprises a multitude of nano-scaled conductors embedded in an insulating matrix, so that each probe is formed by a plurality of nano-scaled conductors.

    摘要翻译: 本发明涉及一种用于IC的电气测试的探测装置,其包括半导体衬底和附着于衬底的各向异性导电接触器。 衬底包括集成电路部分,集成电路部分包括衬底表面上的接触垫阵列。 接触器连接到焊盘阵列并且包括探针阵列,每个探针与一个焊盘接触。 IC部分包括用于选择多个探针并将所选探针连接到设备的I / O端子以连接到测试设备的电路。 根据特定实施例,各向异性导电接触器包括嵌入绝缘基体中的多个纳米级导体,使得每个探针由多个纳米级导体形成。