公开(公告)号：EP4020183A1

公开(公告)日：2022-06-29

申请号：EP21198742.5

申请日：2021-09-24

申请人： Intel Corporation

发明人： AGGARWAL, Deepti ,  ESPIG, Michael ,  NOUIRA, Chekib ,  VALENTINE, Robert ,  CHARNEY, Mark

IPC分类号： G06F9/30 ,  G06F9/345

摘要： In an embodiment, a processor includes: a fetch circuit to fetch instructions, the instructions including a sum of squared differences (SSD) instruction; a decode circuit to decode the SSD instruction; and an execution circuit to, during an execution of the decoded SSD instruction, generate an SSD output vector based on a plurality of input vectors, the SSD output vector including a plurality of squared differences values. Other embodiments are described and claimed.

公开(公告)号：EP4315043A1

公开(公告)日：2024-02-07

申请号：EP22776285.3

申请日：2022-02-18

申请人： INTEL Corporation

发明人： AGGARWAL, Deepti ,  ESPIG, Michael ,  VALENTINE, Robert ,  CHARNEY, Mark

IPC分类号： G06F9/38 ,  G06F9/30

公开(公告)号：EP4437412A1

公开(公告)日：2024-10-02

申请号：EP22896628.9

申请日：2022-10-25

申请人： Intel Corporation

发明人： JOSHI, Prakaram ,  AGGARWAL, Deepti ,  POORNACHANDRAN, Rajesh ,  ESPIG, Michael

IPC分类号： G06F9/48 ,  G06F11/30 ,  G06F30/392

CPC分类号： Y02D10/00 ,  G06F9/5094