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公开(公告)号：EP4017005A1
公开(公告)日：2022-06-22
申请号：EP21198867.0
申请日：2021-09-24
申请人： Intel Corporation
发明人： BOYCE, Jill , JAIN, Nilesh , GANESH, Brinda , LEI, Zhijun , HURST, Craig , HOLLAND, James , POSSOS, Sebastian , MOHAN, Sumit , NOUIRA, Chekib , KOSSENTINI, Faouzi , TMAR, Hassene , BEN AMARA, Foued
IPC分类号： H04N19/42 , H04N19/114 , H04N19/127 , H04N19/176
摘要： Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.
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公开(公告)号：EP3503551A3
公开(公告)日：2019-10-02
申请号：EP18207422.9
申请日：2018-11-20
申请人： INTEL Corporation
IPC分类号： H04N19/436 , H04N19/119 , H04N19/107 , H04N19/176 , H04N19/14 , H04N19/147 , H04N19/86 , G06T5/00
摘要： Techniques related to video encoding that provide for a decoupled prediction and coding structure for improved performance are discussed. Such techniques include determining final partitioning decisions for blocks of a picture by evaluating intra modes for candidate partitions by comparing the candidate partitions to intra predicted partitions generated using only original pixel samples and evaluating inter modes for the candidate partitions by comparing the candidate partitions to search partitions including original pixel samples and encoding using the final partitioning decision.
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公开(公告)号：EP4020183A1
公开(公告)日：2022-06-29
申请号：EP21198742.5
申请日：2021-09-24
申请人： Intel Corporation
摘要： In an embodiment, a processor includes: a fetch circuit to fetch instructions, the instructions including a sum of squared differences (SSD) instruction; a decode circuit to decode the SSD instruction; and an execution circuit to, during an execution of the decoded SSD instruction, generate an SSD output vector based on a plurality of input vectors, the SSD output vector including a plurality of squared differences values. Other embodiments are described and claimed.
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公开(公告)号：EP3503551A2
公开(公告)日：2019-06-26
申请号：EP18207422.9
申请日：2018-11-20
申请人： INTEL Corporation
IPC分类号： H04N19/42 , H04N19/436 , H04N19/119 , H04N19/107 , H04N19/176 , H04N19/14 , H04N19/147 , G06T5/00
摘要： Techniques related to video encoding that provide for a decoupled prediction and coding structure for improved performance are discussed. Such techniques include determining final partitioning decisions for blocks of a picture by evaluating intra modes for candidate partitions by comparing the candidate partitions to intra predicted partitions generated using only original pixel samples and evaluating inter modes for the candidate partitions by comparing the candidate partitions to search partitions including original pixel samples and encoding using the final partitioning decision.
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