公开(公告)号：EP4203641A1

公开(公告)日：2023-06-28

申请号：EP22205746.5

申请日：2022-11-07

申请人： INTEL Corporation

发明人： ONG, Clifford ,  LAVRIC, Dan ,  GULER, Leonard ,  CHIU Yen Ting ,  SHRIDHARAN, Smita ,  GUO, Zheng ,  KARL, Eric A. ,  GHANI, Tahir

IPC分类号： H10B10/00 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

摘要： Integrated circuit (IC) static random-access memory (SRAM) comprising pass-gate transistors (292) and pull-down transistors (291) having different threshold voltages (Vt). A pass-gate transistor with a higher Vt than the pull-down transistor may reduce read instability of a bit-cell, and/or reduce overhead associated with read assist circuitry coupled to the bit-cell. In some examples, a different amount of a dipole dopant source material is deposited as part of the gate insulator for the pull-down transistor than for the pass-gate transistor, reducing the Vt of the pull-down transistor accordingly. In some examples, an N-dipole dopant source material is removed from the pass-gate transistor prior to a drive/activation anneal is performed. After drive/activation, the N-dipole dopant source material may be removed from the pull-down transistor and a same gate metal deposited over both the pass-gate and pull-down transistors.