公开(公告)号：EP4453746A1

公开(公告)日：2024-10-30

申请号：EP22912177.7

申请日：2022-03-31

申请人： Intel Corporation

发明人： FRYMAN, Joshua B. ,  OH, Byoungchan ,  POLAGANI, Sai Dheeraj ,  MA, Kevin P. ,  PAWLOWSKI, Robert S. ,  KRISHNAMURTHY, Bharadwaj Coimbatore ,  SHARMA, Shruti ,  VASANTHA KUMAR, Smitha P. ,  HOWARD, Jason ,  KLOWDEN, Daniel S.

IPC分类号： G06F15/80 ,  G06F15/17 ,  G06F15/173 ,  G06F13/16

公开(公告)号：EP2798474A1

公开(公告)日：2014-11-05

申请号：EP11878437.0

申请日：2011-12-30

申请人： Intel Corporation

发明人： MAKINENI, Srihari ,  KING, Steven R. ,  REDKIN, Alexander ,  FRYMAN, Joshua B. ,  IYER, Ravishankar ,  SMIRNOV, Pavel S. ,  GUSEV, Dmitry ,  PAVLOV, Dmitri

IPC分类号： G06F9/30

CPC分类号： G06F9/30145 ,  G06F1/3234 ,  G06F9/30181 ,  G06F9/30196 ,  G06F9/3891

摘要： A processor may be built with cores that only execute some partial set of the instructions needed to be fully backwards compliant. Thus, in some embodiments power consumption may be reduced by providing partial cores that only execute certain instructions and not other instructions. The instructions not supported may be handled in other, more energy efficient ways, so that, the overall processor, including the partial core, may be fully backwards compliant.

公开(公告)号：EP4453717A1

公开(公告)日：2024-10-30

申请号：EP22912244.5

申请日：2022-11-22

申请人： Intel Corporation

发明人： PAWLOWSKI, Robert S. ,  CLINE, Scott N. ,  HOWARD, Jason ,  FRYMAN, Joshua B. ,  GANEV, Ivan B.

IPC分类号： G06F9/30 ,  G06F12/1081 ,  G06F12/02

公开(公告)号：EP4203079A1

公开(公告)日：2023-06-28

申请号：EP22201853.3

申请日：2022-10-17

申请人： INTEL Corporation

发明人： AHMED, Khaled ,  TADAYON, Pooya ,  FRYMAN, Joshua B. ,  SHUMARAYEV, Sergey Yuryevich

IPC分类号： H01L31/12 ,  H01L25/16 ,  H01L31/147

摘要： Technologies for chip-to-chip optical data transfer are disclosed. In the illustrative embodiment (FIG. 2), microLEDs (108) on a first chip (108) are used to send data to microphotodiodes (110) on a second chip (106). The beams from the microLEDs may be sent to the microphotodiodes using an optical bridge (112) as in fig. 2, microprisms, or using a channel through a substrate, a channel defined in a substrate, etc. The microLEDs (108) may be used for high-speed data transfer with low power usage. A chip may include a relatively large number of microLEDs (108) and/or microphotodiodes (110), allowing for a large bandwidth connection. MicroLEDs and microphotodiodes may be used to connect different parts of the same chip, different chips on the same package, different packages on the same device, or different chips on different devices.

公开(公告)号：EP3588297A1

公开(公告)日：2020-01-01

申请号：EP19175809.3

申请日：2019-05-21

申请人： INTEL Corporation

发明人： PAWLOWSKI, Robert ,  MORE, Ankit ,  SMITH, Shaden ,  PITCHAIMOORTHY, Sowmya ,  JAIN, Samkit ,  CAVÉ, Vincent ,  AANANTHAKRISHNAN, Sriram ,  HOWARD, Jason M. ,  FRYMAN, Joshua B.

IPC分类号： G06F9/52

摘要： In one embodiment, a first processor core includes: a plurality of execution pipelines each to execute instructions of one or more threads; a plurality of pipeline barrier circuits coupled to the plurality of execution pipelines, each of the plurality of pipeline barrier circuits associated with one of the plurality of execution pipelines to maintain status information for a plurality of barrier groups, each of the plurality of barrier groups formed of at least two threads; and a core barrier circuit to control operation of the plurality of pipeline barrier circuits and to inform the plurality of pipeline barrier circuits when a first barrier has been reached by a first barrier group of the plurality of barrier groups. Other embodiments are described and claimed.