公开(公告)号：EP4155947A1

公开(公告)日：2023-03-29

申请号：EP22184591.0

申请日：2022-07-13

申请人： INTEL Corporation

发明人： Zhang, Yongmei ,  Hilewitz, Yedidya ,  Liu, Yen-Cheng

IPC分类号： G06F12/0831 ,  G06F12/121

摘要： In an embodiment, a processor may include an execution engine to execute a plurality of instructions, a memory to store a tagged data structure comprising a plurality of entries, and an eviction circuit. The eviction circuit may be to: generate a pseudo-random number responsive to an eviction request for the tagged data structure; in response to a determination that the pseudo-random number is outside of a valid eviction range for the plurality of entries, generate an alternative identifier by rotating through the valid eviction range, the valid eviction range comprising a range of numbers that are valid to identify victim entries of the tagged data structure; and evict a victim entry from the tagged data structure, the victim entry associated with the alternative identifier. Other embodiments are described and claimed.