摘要:
A Node-B/base station has an access burst detector. The access burst detector comprises at least one antenna (28 1 -28 M ) for receiving signals from users and a pool of reconfigurable correlators, implemented in ASIC. Each correlator (36 1 -36 O ) correlates an inputted access burst code at an inputted code phase with an inputted antenna output. An antenna controller (30) selectively couples any output of the at least one antenna to an input of any of the correlators. A code controller (32) provides to an input of each correlator an access burst code. The code controller controls the inputted code phase of each controller. A sorter/post processor (38) sorts output energy levels of the correlators.
摘要:
A wireless transmit receive unit (WTRU) and methods are used in a wireless communication system to process sampled received signals to establish and/or maintain wireless communications. A selectively controllable coherent accumulation unit produces power delay profiles (PDPs). A selectively controllable post processing unit passes threshold qualified magnitude approximation values and PDP positions to a device such as a rake receiver to determine receive signal paths.
摘要:
A Node-B/base station comprises a plurality of antennas (28I - 28M) for receiving user signals and a path searcher. The path searcher comprises a set of correlators (42-1, 42-2 … 42-P). Each correlator of the set of correlators correlates an inputted user code with an inputted antenna output. An antenna controller selectively couples an output of one of the plurality of antennas to an input of each.
摘要:
A Node-B/base station has an access burst detector. The access burst detector comprises at least one antenna (28 1 -28 M ) for receiving signals from users and a pool of reconfigurable correlators, implemented in ASIC. Each correlator (36 1 -36 O ) correlates an inputted access burst code at an inputted code phase with an inputted antenna output. An antenna controller (30) selectively couples any output of the at least one antenna to an input of any of the correlators. A code controller (32) provides to an input of each correlator an access burst code. The code controller controls the inputted code phase of each controller. A sorter/post processor (38) sorts output energy levels of the correlators.