摘要:
A Node-B/base station has an access burst detector. The access burst detector comprises at least one antenna (28 1 -28 M ) for receiving signals from users and a pool of reconfigurable correlators, implemented in ASIC. Each correlator (36 1 -36 O ) correlates an inputted access burst code at an inputted code phase with an inputted antenna output. An antenna controller (30) selectively couples any output of the at least one antenna to an input of any of the correlators. A code controller (32) provides to an input of each correlator an access burst code. The code controller controls the inputted code phase of each controller. A sorter/post processor (38) sorts output energy levels of the correlators.
摘要:
A wireless transmit/receive unit (WTRU 250, Figure 1) for processing code division multiple access (CDMA) signals. The WTRU includes modem host (300) and a high speed downlink packet access (HSDPA) co-processor (400) , which communicate over a plurality of customizable interfaces. The modem host operates in accordance with third generation partnership project (3GPP) Release 4 (R4) standards, and the HSDPA co-processor enhances the wireless communication capabilities of the WTRU as a whole such that the WTRU operates in accordance with 3GPP Release 5 (S3) standards.
摘要:
A Node-B/base station has an access burst detector. The access burst detector comprises at least one antenna (28 1 -28 M ) for receiving signals from users and a pool of reconfigurable correlators, implemented in ASIC. Each correlator (36 1 -36 O ) correlates an inputted access burst code at an inputted code phase with an inputted antenna output. An antenna controller (30) selectively couples any output of the at least one antenna to an input of any of the correlators. A code controller (32) provides to an input of each correlator an access burst code. The code controller controls the inputted code phase of each controller. A sorter/post processor (38) sorts output energy levels of the correlators.
摘要:
A Node-B/base station receiver comprises at least one antenna for receiving signals. Each finger of a pool of reconfigurable Rake fingers recovers a multipath component of a user and is assigned a code of the user, a code phase of the multipath component and an antenna of the at least one antenna. An antenna/Rake finger pool interface provides each finger of the Rake pool an output of the antenna assigned to that Rake finger. A combiner combines the recovered multipath components for a user to produce data of the user.
摘要:
A rake architecture for a frequency division duplex (FDD) and use also in TDD and TD-SCDMA type communications system, designed to significantly reduce the memory capacity required and thereby also reduce an area on the die of an application specific integrated circuit (ASIC) into which the memory is integrated. A single circular buffer (60) , preferably of the shared memory type is shared by all of the rake fingers (RAKE FINGERS 1, 2, 3, 4, 5 and 6) of a rake receiver to significantly reduce the hardware and software required to time align multipath signals (DATA IN) received by a UE from a base station. The unique time alignment technique also reduces the number of code generators (62, 64 and 66) required to track a plurality (typically three) of base stations.
摘要:
A wireless transmit receive unit (WTRU) and methods are used in a wireless communication system to process sampled received signals to establish and/or maintain wireless communications. A selectively controllable coherent accumulation unit produces power delay profiles (PDPs). A selectively controllable post processing unit passes threshold qualified magnitude approximation values and PDP positions to a device such as a rake receiver to determine receive signal paths.
摘要:
A Node-B/base station comprises a plurality of antennas (28I - 28M) for receiving user signals and a path searcher. The path searcher comprises a set of correlators (42-1, 42-2 … 42-P). Each correlator of the set of correlators correlates an inputted user code with an inputted antenna output. An antenna controller selectively couples an output of one of the plurality of antennas to an input of each.
摘要:
A rake architecture for a frequency division duplex (FDD) and use also in TDD and TD-SCDMA type communications system, designed to significantly reduce the memory capacity required and thereby also reduce an area on the die of an application specific integrated circuit (ASIC) into which the memory is integrated. A single circular buffer (60) , preferably of the shared memory type is shared by all of the rake fingers (RAKE FINGERS 1, 2, 3, 4, 5 and 6) of a rake receiver to significantly reduce the hardware and software required to time align multipath signals (DATA IN) received by a UE from a base station. The unique time alignment technique also reduces the number of code generators (62, 64 and 66) required to track a plurality (typically three) of base stations.