公开(公告)号：EP2095419A1

公开(公告)日：2009-09-02

申请号：EP07865500.8

申请日：2007-12-11

申请人： International Business Machines Corporation

发明人： FAROOQ, Mukta, G. ,  JUNG, Dae-young ,  MELVILLE, Ian, D.

IPC分类号： H01L23/48

CPC分类号： H01L21/67092 ,  H01L21/78 ,  H01L23/562 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention is directed to an improved semiconductor chip that reduces crack initiation and propagation into the active area of a semiconductor chip. A semiconductor wafer includes dicing channels (102) that separate semiconductor chips and holes (220) through a portion of a semiconductor chip, which are located at the intersection of the dicing channels (102). Once diced from the semiconductor wafer, semiconductor chips are created without ninety degree angle corners.

公开(公告)号：EP2008301A2

公开(公告)日：2008-12-31

申请号：EP07760071.6

申请日：2007-04-04

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： EDELSTEIN, Daniel, C. ,  FAROOQ, Mukta, G. ,  HANNON, Robert ,  MELVILLE, Ian, D.

IPC分类号： H01L21/44 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L24/03 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/03019 ,  H01L2224/039 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/13022 ,  H01L2224/13116 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/01074 ,  H01L2924/00011 ,  H01L2924/00015 ,  H01L2924/01039 ,  H01L2224/05552

摘要： A method for far back end of line (FBEOL) semiconductor device formation includes forming a terminal copper pad (104) in an upper level of a semiconductor wafer (106), forming an insulating stack (114) over the terminal copper pad, and patterning and opening a terminal via (116) within a portion of the insulating stack so as to leave a bottom cap layer of the insulating stack protecting the terminal copper pad. An organic passivation layer (126) is formed and patterned over the top of the insulating stack, and the bottom cap layer (118) over the terminal copper pad is removed. A ball limiting metallurgy (BLM) stack (128) is deposited over the organic passivation layer and terminal copper pad, and a solder ball connection (108) is formed on a patterned portion of the BLM stack.